search for: fuc

...ons(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c index fffd01a..6ebdc4c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c @@ -48,11 +48,7 @@ struct gf100_ramfuc { struct ramfuc_reg r_0x137390; - struct ramfuc_reg r_0x10f290; - struct ramfuc_reg r_0x10f294; - struct ramfuc_reg r_0x10f298; - struct ramfuc_reg r_0x10f29c; - struct ramfuc_reg r_0x10f2a0; + struct ramfuc_reg r_0x10f290[5]; struct ramfuc_reg r_0x10f300; struct ramfuc_reg r_0x10f338;...

From: Martin Peres <martin.peres at labri.fr> --- nvkm/subdev/pwr/fuc/kernel.fuc | 13 +++++++++++++ nvkm/subdev/pwr/fuc/nv108.fuc.h | 25 +++++++++++-------------- nvkm/subdev/pwr/fuc/nva3.fuc.h | 23 ++++++++++------------- nvkm/subdev/pwr/fuc/nvc0.fuc.h | 23 ++++++++++------------- nvkm/subdev/pwr/fuc/nvd0.fuc.h | 23 ++++++++++------------- 5 files changed,...

Following a series of patches that implement memory reclocking for NVA3/5/8 with DDR2, DDR3 and GDDR3 on board. I tested these patches on 6 different graphics cards, but I expect reclocking now to work on many more. Testers can pick up these patches and test it by enabling pstate (nouveau.pstate=1). They should then be able to change clocks by writing to /sys/class/drm/card0/device/pstate. Correct

...0001f); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c index 6ebdc4c..b4fe3bb 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c @@ -50,11 +50,7 @@ struct gf100_ramfuc { struct ramfuc_reg r_0x10f290[5]; - struct ramfuc_reg r_0x10f300; - struct ramfuc_reg r_0x10f338; - struct ramfuc_reg r_0x10f340; - struct ramfuc_reg r_0x10f344; - struct ramfuc_reg r_0x10f348; + struct ramfuc_reg r_mr[9]; struct ramfuc_reg r_0x10f910; struct ramfuc_reg r_0x10f914; @@...

On 26/02/16 17:19, Karol Herbst wrote: > currently there is no change, because nobody uses those macros yet, but they > shouldn't stay broken > > Signed-off-by: Karol Herbst <nouveau at karolherbst.de> > --- > drm/nouveau/nvkm/subdev/pmu/fuc/macros.fuc | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drm/nouveau/nvkm/subdev/pmu/fuc/macros.fuc b/drm/nouveau/nvkm/subdev/pmu/fuc/macros.fuc > index 0d5cbeb..bb59eb4 100644 > --- a/drm/nouveau/nvkm/subdev/pmu/fuc/macros.fuc > +++ b/drm/nouveau/n...

Re-use the therm-exported fan structure with only two minor modifications: - pwm_freq: u16 -> u32; - add fan_type (toggle or PWM) v2: - Do not memset the table to 0 as it erases the pre-set default values Signed-off-by: Martin Peres <martin.peres at free.fr> --- drm/Kbuild | 1 + drm/core/include/subdev/bios/fan.h | 1 + drm/core/subdev/bios/fan.c | 1

Hello, Attached a small patch that correctly identifies the DLLoff bit for >=GF100. Marked RFC because I haven't seen any GDDR5 samples that *enable* the DLL. I'd like to verify whether the DLL should be reset when enabled. Could increase likelihood of succesfull reclock. Ben: could you do some experiments with this bit to see if GDDR5 needs some DLL reset logic? Thanks, and happy

...t wrote: >>> currently there is no change, because nobody uses those macros yet, but >>> they >>> shouldn't stay broken >>> >>> Signed-off-by: Karol Herbst <nouveau at karolherbst.de> >>> --- >>> drm/nouveau/nvkm/subdev/pmu/fuc/macros.fuc | 4 ++-- >>> 1 file changed, 2 insertions(+), 2 deletions(-) >>> >>> diff --git a/drm/nouveau/nvkm/subdev/pmu/fuc/macros.fuc >>> b/drm/nouveau/nvkm/subdev/pmu/fuc/macros.fuc >>> index 0d5cbeb..bb59eb4 100644 >>> --- a/drm/nouveau/n...

From: Karol Herbst <git at karolherbst.de> we need this, because since kepler there is PCOPY2 and this is needed for the counters later in this series --- drm/nouveau/nvkm/subdev/pmu/fuc/gk104.fuc4 | 70 + drm/nouveau/nvkm/subdev/pmu/fuc/gk104.fuc4.h | 1795 ++++++++++++++++++++++++++ drm/nouveau/nvkm/subdev/pmu/fuc/macros.fuc | 1 + drm/nouveau/nvkm/subdev/pmu/gk104.c | 4 +- drm/nouveau/nvkm/subdev/pmu/gk110.c | 6 +- 5 files changed, 1870 inserti...

It's supposed to always be 0, but at least nv_iowr() temporarily violates this. Since the ih touches $r0, it should be stored. Signed-off-by: Roy Spliet <rs855 at cam.ac.uk> --- drm/nouveau/nvkm/engine/gr/fuc/gpc.fuc | 2 + drm/nouveau/nvkm/engine/gr/fuc/gpcgf100.fuc3.h | 80 ++++---- drm/nouveau/nvkm/engine/gr/fuc/gpcgf117.fuc3.h | 82 ++++---- drm/nouveau/nvkm/engine/gr/fuc/gpcgk104.fuc3.h | 82 ++++---- drm/nouveau/nvkm/engine/gr/fuc/gpcgk110.fuc3.h | 82 ++++---- drm/nouveau/nvkm/engin...

...nux.intel.com> wrote: > > In order to comply with the CoC, replace **** with a hug. > > Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen at linux.intel.com> > --- > drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c | 2 +- > drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/macros.fuc | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c > index 9cc10e438b3d..55a0060881ea 100644 > --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c &...

...etion(-) diff --git a/drm/nouveau/nvkm/subdev/fb/ramgf100.c b/drm/nouveau/nvkm/subdev/fb/ramgf100.c index 4a9bd4f1..feb8820c 100644 --- a/drm/nouveau/nvkm/subdev/fb/ramgf100.c +++ b/drm/nouveau/nvkm/subdev/fb/ramgf100.c @@ -717,7 +717,7 @@ gf100_ram_new_(const struct nvkm_ram_func *func, ram->fuc.r_0x10f9b4 = ramfuc_reg(0x10f9b4); ram->fuc.r_0x10fb04 = ramfuc_reg(0x10fb04); ram->fuc.r_0x10fb08 = ramfuc_reg(0x10fb08); - ram->fuc.r_0x137310 = ramfuc_reg(0x137300); + ram->fuc.r_0x137300 = ramfuc_reg(0x137300); ram->fuc.r_0x137310 = ramfuc_reg(0x137310); ram->fuc.r_0x1...

No, no, these will not implement Fermi reclocking. This set of patches contains some of the preparatory work that I deem stable enough to move upstream. Notable changes - Training pattern upload routines from GK104+ now shared with GT215+ - Timing calculation for Fermi - GDDR5 MR calculation from VBIOS timing table v1.0. Also useful for that pesky GT 240. - A routine to translate a VBIOS init

...ad counters we can use to get information about the current load of the gpu. This series includes the needed pmu bits and a debugfs interface to read them out. Currently the values are between 0 and 255, because it is much easier to implement it this way on the pmu. Karol Herbst (4): subdev/pmu/fuc: add gk104 pmu/fuc: add macros for pdaemon pwr counters subdev/pmu/fuc: implement perf nouveau/debugfs: add interface for current load drm/nouveau/include/nvif/device.h | 1 + drm/nouveau/include/nvkm/subdev/pmu.h | 10 + drm/nouveau/nouveau_debugfs.c |...

Look for firmware files using the legacy ("nouveau/nvxx_fucxxxx") path if they cannot be found in the new, "official" path. User setups were broken by the switch, which is bad. There are only 4 firmware files we may want to look up that way, so hardcode them into the lookup function. All new firmware files should use the standard "nvidi...

while trying out my pmu_counter patches on a gk208 gpu, I notived that the pmu is pretty much screwed up there. Karol Herbst (4): pmu/fuc: fix imm32 for gk208+ pmu/fuc: replace mov+sethi with imm32 pmu/fuc: call# seems to be broken on gk208 pmu/fuc: movw is somewhat weird on gk208, use mov instead drm/nouveau/nvkm/subdev/pmu/fuc/gf100.fuc3.h | 1598 +++++++++++------------ drm/nouveau/nvkm/subdev/pmu/fuc/gf119.fuc4.h | 1494 +...

for some reasons these calls don't really go there where they should go leading to various corruptions of the PMU state Signed-off-by: Karol Herbst <nouveau at karolherbst.de> --- drm/nouveau/nvkm/subdev/pmu/fuc/gk208.fuc5.h | 12 ++++++------ drm/nouveau/nvkm/subdev/pmu/fuc/kernel.fuc | 6 +++--- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/pmu/fuc/gk208.fuc5.h b/drm/nouveau/nvkm/subdev/pmu/fuc/gk208.fuc5.h index 776e672..3c731ff 100644 --- a/drm/nouveau/nvkm/s...

Signed-off-by: Roy Spliet <rspliet at eclipso.eu> --- drivers/gpu/drm/nouveau/core/include/subdev/pwr.h | 2 + drivers/gpu/drm/nouveau/core/subdev/fb/ramfuc.h | 16 ++ drivers/gpu/drm/nouveau/core/subdev/fb/ramnva3.c | 318 +++++++++++++++++++-- .../gpu/drm/nouveau/core/subdev/pwr/fuc/memx.fuc | 111 +++++++ drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/os.h | 5 + drivers/gpu/drm/nouveau/core/subdev/pwr/memx.c | 35 ++- 6 files changed,...

Two patches went missing as a result of PEBCAK. No v2 marks as nothing changed really. Just resending for easier enforcement of patch order in other people's trees. Sorry for the noise. Original message: No, no, these will not implement Fermi reclocking. This set of patches contains some of the preparatory work that I deem stable enough to move upstream. Notable changes - Training pattern

...leaving 3 for other stuff we might want to add to decide better on new clocks 3. I want to expose those loads through NVIF, but I don't have a good idea how to do that. Anyway the debugfs file will be a wrapper around the nvif stuff then for convenience Karol Herbst (4): subdev/pmu/fuc: add gk104 pmu/fuc: add macros for pdaemon pwr counters subdev/pmu/fuc: implement counter readout nouveau/debugfs: add interface for current load drm/nouveau/include/nvif/device.h | 1 + drm/nouveau/include/nvkm/subdev/pmu.h | 10 + drm/nouveau/nouveau_debugfs.c...