search for: fstp

...dword ptr ds:[161D624Ch],0 1716043B mov eax,76E4560h 17160440 mov dword ptr [esp],eax 17160443 call HueVMReadCommands_LLVMReadVoxel (19BB229h) 17160448 fsub dword ptr ds:[161D6280h] 1716044E fabs 17160450 fst qword ptr [esp+14h] 17160454 ftst 17160456 fstp st(0) 17160458 fnstsw ax 1716045A sahf 1716045B fldz 1716045D fchs 1716045F fld qword ptr [esp+14h] 17160463 fucomip st,st(1) 17160465 fstp st(0) 17160467 jbe 17160498 1716046D mov eax,76E4F60h 17160472 mov dword ptr [esp+0Ch],eax 171...

Hello, I am trying to make the FP intrinsics (abs, sin, cos, sqrt) I've added work with the X86ISelPattern, but I'm having some difficulties understanding what needs to be done. I assume I have to add new nodetypes for the FP instructions to SelectionDAGNodes.h, and make nodes for these in SelectionDAGLowering::visitCall when I find the intrinsic... The part I don't quite

More specifically, about this patch: http://git.xiph.org/?p=flac.git;a=commitdiff;h=70b078cfd5f9d4b0692c33f018cac3c652b14f90 I downloaded the latest code from git (flac-70b078c), disabled all SSE optimizations in the code and compiled it (GCC 4.8.2). This patch doesn't change FLAC output. Either gcc is too smart and optimizes this new code back to the old, or this fix is MSVS-specific. Or

...t some > SSE optim made by GCC I added "XIPH_ADD_CFLAGS([-mfpmath=387])" into configure.ac Still the result is different from SSE version. --------------- MSVS adds two instructions to the generated code after the patch: fld DWORD PTR [eax] inc ecx fmul ST(0), ST(1) add eax, 4 fstp DWORD PTR tv2337[esp+20] <- this: (copy from FP stack to tmp) fld DWORD PTR tv2337[esp+20] <- and this (copy from tmp to FP stack) fadd DWORD PTR [ebx+ecx*4-4] fstp DWORD PTR [ebx+ecx*4-4] However GCC doesn't do this: lea ecx, [eax+2] fld DWORD PTR [edx+ecx*4] fmul st, st(1...

...sequence. It's generating _both_ the SAHF and the fucomi -- look at the code ISelPattern generates: 17160443 call HueVMReadCommands_LLVMReadVoxel (19BB229h) 17160448 fsub dword ptr ds:[161D6280h] 1716044E fabs 17160450 fst qword ptr [esp+14h] 17160454 ftst 17160456 fstp st(0) 17160458 fnstsw ax 1716045A sahf 1716045B fldz 1716045D fchs 1716045F fld qword ptr [esp+14h] 17160463 fucomip st,st(1) 17160465 fstp st(0) 17160467 jbe 17160498 the ISelSimple generates: 1716047F call eax 17160481 fsub dword pt...

On Wed, 16 Mar 2005, Morten Ofstad wrote: > Hello, > > I didn't get any reply to my previous mail about adding floating point > intrinsics to the X86 pattern instruction selector... And I could really need > some help. Sorry about that, it slipped through the cracks. :( > Anyway, I think my confusion was caused partly by an already > existing bug in the instruction

Hello, I didn't get any reply to my previous mail about adding floating point intrinsics to the X86 pattern instruction selector... And I could really need some help. Anyway, I think my confusion was caused partly by an already existing bug in the instruction selection for floating point compares. The case which emits code for the special case of comparing against constant 0.0 does not

...s file format ELF32-i386, i wanna to know is there a way to output COFF format along with target=i686-pc-mingw. because I want to compile to following asm file for both linux/gcc and windows/visual C++. .global sqrt .type sqrt, at function sqrt: fldl 4(%esp) fsqrt fstsw %ax sub $12,%esp fld %st(0) fstpt (%esp) mov (%esp),%ecx and $0x7ff,%ecx cmp $0x400,%ecx jnz 1f and $0x200,%eax sub $0x100,%eax sub %eax,(%esp) fstp %st(0) fldt (%esp) 1: add $12,%esp fstpl 4(%esp) fldl 4(%esp) ret > > Cheers, > Rafael -- 此致 礼 罗勇刚 Yours sincerely, Yonggang Luo

...&& "Got into the map somehow?"), function AddLegalizedOperand, file /usr/home/llvm/obj/../lib/CodeGen/SelectionDAG/LegalizeDAG.cpp, line 79. .text .align 16 .globl test1 .type test1, @function test1: fldl 4(%esp) ftst fstp %st(0) fnstsw sahf setne %al movzbl %al, %eax #FP_REG_KILL ret Abort trap (core dumped) FAIL: /usr/home/llvm/obj/../test/Regression/CodeGen/X86/fast-cc-pass-in-regs.ll: Does not have a RUN line Running /usr/home/llvm/obj/../test/Regression/Debugger...

...n value is given in EDX:EAX. In effect, I need to call it like this: %1 = call i64 asm "call __ftol2", "=A,{st},~{dirflag},~{fpsr},~{flags}" (double %x) nounwind but with the added consideration that the input operand is popped by the call, so the callee can't emit its own fstp instruction afterward. LLVM inline asm doesn't appear to be capable of communicating this. In #llvm it was suggested to write a custom instruction for the call, but it looks like there are a few layers of abstraction in the X86 target for dealing with x87, and I can't quite grasp exactly ho...

...ay to output COFF format along with target=i686-pc-mingw. > because I want to compile to following asm file for both linux/gcc and > windows/visual C++. > > .global sqrt > .type sqrt, at function > sqrt: fldl 4(%esp) > fsqrt > fstsw %ax > sub $12,%esp > fld %st(0) > fstpt (%esp) > mov (%esp),%ecx > and $0x7ff,%ecx > cmp $0x400,%ecx > jnz 1f > and $0x200,%eax > sub $0x100,%eax > sub %eax,(%esp) > fstp %st(0) > fldt (%esp) > 1: add $12,%esp > fstpl 4(%esp) > fldl 4(%esp) > ret > > > > > Cheers, > > Rafael &g...

Jean-Marc Valin wrote: >If you set the denoiser to "on" and the VAD to "off", what difference >does it make in CPU time? > <p>Same program, running on Athlon XP 1700+: Test 1, using VAD, but AGC, denoise off: tevek@canarsie:~/work/hms/app_conference $ time ./vad_test /tmp/demo-instruct.sw 5 reading from /tmp/demo-instruct.sw, repeating 5 times read 537760

Hi all, Just a quick question about the X86 instruction naming convention in LLVM. Most instruction names in LLVM are self-explanatory. Some are a little confusing. What is the difference between instruction MULSSrr and MULSSrr_Int? What does the suffix '_Int' stand for? Are these instructions exchangeable: "ST_F64m", "ST_FP64m", "ST_Fp64m"

...n effect, I need to call it like this: > > %1 = call i64 asm "call __ftol2", > "=A,{st},~{dirflag},~{fpsr},~{flags}" (double %x) nounwind > > but with the added consideration that the input operand is popped by > the call, so the callee can't emit its own fstp instruction afterward. > LLVM inline asm doesn't appear to be capable of communicating this. This should work: %1 = call i64 asm "call __ftol2", "=A,{st},~{dirflag},~{fpsr},~{flags},~{st}" (double %x) nounwind See http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/...

On 19 October 2013 06:01, 罗勇刚(Yonggang Luo) <luoyonggang at gmail.com> wrote: > I found that access llvm-mc from clang driver is impossible, and I > want to use llvm-mc to compile assembly files, how to do that? Try "clang -integrated-as -c test.s" Cheers, Rafael

...686-pc-mingw. >> because I want to compile to following asm file for both linux/gcc and >> windows/visual C++. >> >> .global sqrt >> .type sqrt, at function >> sqrt: fldl 4(%esp) >> fsqrt >> fstsw %ax >> sub $12,%esp >> fld %st(0) >> fstpt (%esp) >> mov (%esp),%ecx >> and $0x7ff,%ecx >> cmp $0x400,%ecx >> jnz 1f >> and $0x200,%eax >> sub $0x100,%eax >> sub %eax,(%esp) >> fstp %st(0) >> fldt (%esp) >> 1: add $12,%esp >> fstpl 4(%esp) >> fldl 4(%esp) >> ret...

...ion 6.41.2 i386 floating point asm operands) According to that page i would assume that it is the job of the compiler to handle the stack usage since the asm doesn't modify the fpu stack and we also didn't mark it as clobbered. Same code compiled with gcc-4.2: fldl 0.84711 fistl -4(%ebp) fstp %st(0) This seems fine and works as expected. Changing the inline asm to __asm__("fistl %0": "=m"(r) : "t"(v) : "st"); // Marking fpu top stack as clobbered Will result in the same output for gcc-4.2 and clang: fldt 0.84711 ## InlineAsm Start fistl -4(%e...

All, in the light of erratum #573 I''m wondering if we need to tweak or conditionally suppress fsincos emulation. The question is whether there is any possibility for getting the emulator to hit this instruction on AMD (as no real mode emulation ought to be taking place there), i.e. whether there are places where emulation gets continued eagerly in anticipation of the need for emulation

...10h] > 76719BB8 mov edx,dword ptr [esp+18h] > 76719BBC mov eax,dword ptr [esp+10h] > 76719BC0 test eax,eax > 76719BC2 je 76719DCF > 76719BC8 fsubp st(1),st > 76719BCA test edx,edx > 76719BCC js 7671F9DB > 76719BD2 fstp dword ptr [esp] > 76719BD5 mov ecx,dword ptr [esp] > 76719BD8 add ecx,7FFFFFFFh > 76719BDE sbb eax,0 > 76719BE1 mov edx,dword ptr [esp+14h] > 76719BE5 sbb edx,0 > 76719BE8 leave > 76719BE9 ret > > > As you can see a...

For example, I execute the following command sequences: H:\CI\bld\compilers\musl\src\math\i386>type sqrt.s #.globl _sqrt .global sqrt #.type sqrt, at function #_sqrt: sqrt: fldl 4(%esp) fsqrt fstsw %ax sub $12,%esp fld %st(0) fstpt (%esp) mov (%esp),%ecx and $0x7ff,%ecx cmp $0x400,%ecx jnz 1f and $0x200,%eax sub $0x100,%eax sub %eax,(%esp) fstp %st(0) fldt (%esp) 1: add $12,%esp fstpl 4(%esp) fldl 4(%esp) ret H:\CI\bld\compi...