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This make sure it's paravirtualized correctly when CONFIG_PARAVIRT=y. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> diff -r 4ff048622391 drivers/md/raid6x86.h --- a/drivers/md/raid6x86.h Thu Dec 28 16:52:54 2006 +1100 +++ b/drivers/md/raid6x86.h Fri Dec 29 10:09:38 2006 +1100 @@ -75,13 +75,14 @@ static inline unsigned long raid6_get_fp unsigned long cr0; preempt_disable();

This make sure it's paravirtualized correctly when CONFIG_PARAVIRT=y. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> diff -r 4ff048622391 drivers/md/raid6x86.h --- a/drivers/md/raid6x86.h Thu Dec 28 16:52:54 2006 +1100 +++ b/drivers/md/raid6x86.h Fri Dec 29 10:09:38 2006 +1100 @@ -75,13 +75,14 @@ static inline unsigned long raid6_get_fp unsigned long cr0; preempt_disable();

...ns the same debugging registers FOP, FIP, and FDP which store the opcode, instruction address, and data address of the instruction most recently executed by the FPU. On processors implementing the "SSE" instruction set, a new pair of instructions fxsave/fxrstor replaces the earlier fsave/frstor pair used for saving and restoring the FPU state. These new instructions also save and restore the contents of the additional registers used by SSE instructions. II. Problem Description On "7th generation" and "8th generation" processors manufactured by AMD, including the AM...

...ns the same debugging registers FOP, FIP, and FDP which store the opcode, instruction address, and data address of the instruction most recently executed by the FPU. On processors implementing the "SSE" instruction set, a new pair of instructions fxsave/fxrstor replaces the earlier fsave/frstor pair used for saving and restoring the FPU state. These new instructions also save and restore the contents of the additional registers used by SSE instructions. II. Problem Description On "7th generation" and "8th generation" processors manufactured by AMD, including the AM...