Displaying 3 results from an estimated 3 matches for "frr16_m_in".
Did you mean:
frr16_m_ins
2012 Sep 16
1
[LLVMdev] Pattern class
Here is a simple place I wanted to use it.
...
On multiply, the result implicit is placed in a 64 bit hi/lo register.
//
// Format: MFLO rx MIPS16e
// Purpose: Move From LO Register
// To copy the special purpose LO register to a GPR.
//
def Mflo16: FRR16_M_ins<0b10010, "mflo", IIAlu> {
let Uses = [LO];
let neverHasSideEffects = 1;
}
//
// Pseudo Instruction for mult
//
def MultRxRy16: FMULT16_ins<"mult", IIAlu> {
let isCommutable = 1;
let neverHasSideEffects = 1;
let Defs = [HI, LO];
}
def: Mips16Pattern<...
2012 Sep 16
0
[LLVMdev] Pattern class
What have you tried?
On Sun, Sep 16, 2012 at 3:34 PM, Kotler, Reed <rkotler at mips.com> wrote:
> This Pattern class says it's possible but seems just to not work or maybe I'm using it incorrectly.
>
> Probably I will go and fix it when I'm done with mips16.
>
>
> ________________________________________
> From: Hal Finkel [hfinkel at anl.gov]
> Sent:
2012 Sep 16
2
[LLVMdev] Pattern class
This Pattern class says it's possible but seems just to not work or maybe I'm using it incorrectly.
Probably I will go and fix it when I'm done with mips16.
________________________________________
From: Hal Finkel [hfinkel at anl.gov]
Sent: Sunday, September 16, 2012 10:59 AM
To: Anton Korobeynikov
Cc: Kotler, Reed; LLVM-Dev [llvmdev at cs.uiuc.edu]
Subject: Re: [LLVMdev] Pattern