Displaying 9 results from an estimated 9 matches for "fromleg".
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fromlen
2017 Jan 31
2
Folding zext from i1 into PHI nodes with only zwo incoming values.
...vert from a legal to an illegal type or from a
> smaller
> +/// to a larger illegal type. Width of '1' is always treated as a legal
> type.
> bool InstCombiner::ShouldChangeType(unsigned FromWidth,
> unsigned ToWidth) const {
> - bool FromLegal = DL.isLegalInteger(FromWidth);
> - bool ToLegal = DL.isLegalInteger(ToWidth);
> + bool FromLegal = FromWidth == 1 ? true : DL.isLegalInteger(FromWidth);
> + bool ToLegal = ToWidth == 1 ? true : DL.isLegalInteger(ToWidth);
>
> // If this is a legal integer from type, and the...
2018 Jan 22
2
always allow canonicalizing to 8- and 16-bit ops?
...> benchmarks and look at that results.
>
> Using this patch:
>
> --- a/lib/Transforms/InstCombine/InstructionCombining.cpp
> +++ b/lib/Transforms/InstCombine/InstructionCombining.cpp
> @@ -150,6 +150,9 @@ bool InstCombiner::shouldChangeType(unsigned
> FromWidth,
> bool FromLegal = FromWidth == 1 || DL.isLegalInteger(FromWidth);
> bool ToLegal = ToWidth == 1 || DL.isLegalInteger(ToWidth);
>
> + if (FromLegal && ToWidth < FromWidth && (ToWidth == 8 || ToWidth == 16))
> + return true;
> +
> // If this is a legal integer from ty...
2018 Jan 22
0
always allow canonicalizing to 8- and 16-bit ops?
...not Arm. What I can do though, is run some
benchmarks and look at that results.
Using this patch:
--- a/lib/Transforms/InstCombine/InstructionCombining.cpp
+++ b/lib/Transforms/InstCombine/InstructionCombining.cpp
@@ -150,6 +150,9 @@ bool InstCombiner::shouldChangeType(unsigned FromWidth,
bool FromLegal = FromWidth == 1 || DL.isLegalInteger(FromWidth);
bool ToLegal = ToWidth == 1 || DL.isLegalInteger(ToWidth);
+ if (FromLegal && ToWidth < FromWidth && (ToWidth == 8 || ToWidth == 16))
+ return true;
+
// If this is a legal integer from type, and the result would be...
2017 Jan 31
0
Folding zext from i1 into PHI nodes with only zwo incoming values.
...illegal type or from a
>> smaller
>> +/// to a larger illegal type. Width of '1' is always treated as a legal
>> type.
>> bool InstCombiner::ShouldChangeType(unsigned FromWidth,
>> unsigned ToWidth) const {
>> - bool FromLegal = DL.isLegalInteger(FromWidth);
>> - bool ToLegal = DL.isLegalInteger(ToWidth);
>> + bool FromLegal = FromWidth == 1 ? true : DL.isLegalInteger(FromWidth);
>> + bool ToLegal = ToWidth == 1 ? true : DL.isLegalInteger(ToWidth);
>>
>> // If this is a legal integer...
2017 Jan 31
1
Folding zext from i1 into PHI nodes with only zwo incoming values.
...gt;>> smaller
>>> +/// to a larger illegal type. Width of '1' is always treated as a legal
>>> type.
>>> bool InstCombiner::ShouldChangeType(unsigned FromWidth,
>>> unsigned ToWidth) const {
>>> - bool FromLegal = DL.isLegalInteger(FromWidth);
>>> - bool ToLegal = DL.isLegalInteger(ToWidth);
>>> + bool FromLegal = FromWidth == 1 ? true : DL.isLegalInteger(FromWidth);
>>> + bool ToLegal = ToWidth == 1 ? true : DL.isLegalInteger(ToWidth);
>>>
>>> // If thi...
2017 Jan 30
0
Folding zext from i1 into PHI nodes with only zwo incoming values.
...+/// We don't want to convert from a legal to an illegal type or from a
smaller
+/// to a larger illegal type. Width of '1' is always treated as a legal
type.
bool InstCombiner::ShouldChangeType(unsigned FromWidth,
unsigned ToWidth) const {
- bool FromLegal = DL.isLegalInteger(FromWidth);
- bool ToLegal = DL.isLegalInteger(ToWidth);
+ bool FromLegal = FromWidth == 1 ? true : DL.isLegalInteger(FromWidth);
+ bool ToLegal = ToWidth == 1 ? true : DL.isLegalInteger(ToWidth);
// If this is a legal integer from type, and the result would be an
illeg...
2018 Jan 17
3
always allow canonicalizing to 8- and 16-bit ops?
Example:
define i8 @narrow_add(i8 %x, i8 %y) {
%x32 = zext i8 %x to i32
%y32 = zext i8 %y to i32
%add = add nsw i32 %x32, %y32
%tr = trunc i32 %add to i8
ret i8 %tr
}
With no data-layout or with an x86 target where 8-bit integer is in the
data-layout, we reduce to:
$ ./opt -instcombine narrowadd.ll -S
define i8 @narrow_add(i8 %x, i8 %y) {
%add = add i8 %x, %y
ret i8 %add
}
But on
2017 Jan 30
3
Folding zext from i1 into PHI nodes with only zwo incoming values.
Hi Sanjay,
unfortunately that patch does not help in my case. Here's the IR that fails
to get fully optimized:
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
define fastcc zeroext i1 @testfunc(i8** noalias nocapture readonly
dereferenceable(8)) unnamed_addr {
entry-block:
%1 = load i8*, i8**
2018 Jan 23
0
MachineVerifier and undef
...some
> benchmarks and look at that results.
>
> Using this patch:
>
> --- a/lib/Transforms/InstCombine/InstructionCombining.cpp
> +++ b/lib/Transforms/InstCombine/InstructionCombining.cpp
> @@ -150,6 +150,9 @@ bool InstCombiner::shouldChangeType(unsigned FromWidth,
> bool FromLegal = FromWidth == 1 || DL.isLegalInteger(FromWidth);
> bool ToLegal = ToWidth == 1 || DL.isLegalInteger(ToWidth);
>
> + if (FromLegal && ToWidth < FromWidth && (ToWidth == 8 || ToWidth == 16))
> + return true;
> +
> // If this is a legal integer from ty...