search for: free_domain

...ysdev_map_pirq(struct physd struct msi_info _msi; void *map_data = NULL; - if ( !IS_PRIV(current->domain) ) - return -EPERM; - if ( !map ) return -EINVAL; @@ -49,6 +46,14 @@ static int physdev_map_pirq(struct physd { ret = -ESRCH; goto free_domain; + } + else + { + if ( !IS_PRIV_FOR(current->domain, d) ) + { + ret = -EPERM; + goto free_domain; + } } /* Verify or get vector. */ @@ -161,8 +166,8 @@ static int physdev_unmap_pirq(struct phy struct domain *d; int ret;...

From: Thierry Reding <treding at nvidia.com> The nouveau_fence_get_get_driver_name() function has a redundant _get in its name. Remove it. Signed-off-by: Thierry Reding <treding at nvidia.com> --- drivers/gpu/drm/nouveau/nouveau_fence.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c

Convert the AMD iommu driver to the dma-iommu api. Remove the iova handling and reserve region code from the AMD iommu driver. Change-log: V6: -add more details to the description of patch 001-iommu-amd-Remove-unnecessary-locking-from-AMD-iommu-.patch -rename handle_deferred_device to iommu_dma_deferred_attach -fix double tabs in 0003-iommu-dma-iommu-Handle-deferred-devices.patch V5: -Rebase on

Convert the AMD iommu driver to the dma-iommu api. Remove the iova handling and reserve region code from the AMD iommu driver. Change-log: V4: -Rebase on top of linux-next -Split the removing of the unnecessary locking in the amd iommu driver into a seperate patch -refactor the "iommu/dma-iommu: Handle deferred devices" patch and address comments v3: -rename dma_limit to dma_mask -exit

Convert the AMD iommu driver to the dma-iommu api. Remove the iova handling and reserve region code from the AMD iommu driver. Change-log: V4: -Rebase on top of linux-next -Split the removing of the unnecessary locking in the amd iommu driver into a seperate patch -refactor the "iommu/dma-iommu: Handle deferred devices" patch and address comments v3: -rename dma_limit to dma_mask -exit

...f ( ret ) @@ -186,7 +188,6 @@ static int physdev_map_pirq(struct physd { struct domain *d; int vector, pirq, ret = 0; - unsigned long flags; if ( !IS_PRIV(current->domain) ) return -EPERM; @@ -243,8 +244,8 @@ static int physdev_map_pirq(struct physd goto free_domain; } - spin_lock_irqsave(&d->arch.irq_lock, flags); - if ( map->pirq == -1 ) + spin_lock(&d->evtchn_lock); + if ( map->pirq < 0 ) { if ( d->arch.vector_pirq[vector] ) { @@ -252,6 +253,11 @@ static int physdev_map_pirq(struct physd...

From: Thierry Reding <treding at nvidia.com> Hi, the GPU on Jetson TX2 (GP10B) does not work properly on all devices. Why exactly is not clear, but there are slight differences between the SKUs that were tested. It turns out that the biggest issue is that on some devices (e.g. the one that I have), pulsing the GPU reset twice as is done in the current code (once as part of the power-ungate

These 4 patches fix two issues that existed on Tegra regarding DMA: 1) The bit indicating whether to use an IOMMU or not was hardcoded ; make this a platform property and use it in instmem 2) The DMA mask was not set for platform devices. Fix this by converting more pci_dma* to the DMA API, and use that more generic code to set the DMA mask properly for all platforms. Tested on both x86

Changes since v3: - Use a single dma_attr for all DMA-API allocations in instmem instead of one per allocation - Use device.info.ram_size instead of pfb->ram to check whether VRAM is present outside of nvkm Changes since v2: - Cleaner changes for ltc - Fixed typos in gk20a instmem IOMMU comments Changes since v1: - Add missing else condition in ltc - Remove extra flags that slipped into

Changes since v1: - Add missing else condition in ltc - Remove extra flags that slipped into nouveau_display.c and nv84_fence.c. Original cover letter: Patches 1-3 make the presence of a RAM device optional, and remove GK20A's dummy RAM driver we were using so far. On chips using shared memory, such a device can confuse the driver into moving objects where there is no need to, and can trick

A series I have waited too long to submit, and the recent refactoring made me pay the price of my perfectionism, so here are the features that are at least completed Patches 1-3 make the presence of a RAM device optional, and remove GK20A's dummy RAM driver we were using so far. On chips using shared memory, such a device can confuse the driver into moving objects where there is no need to,

Thanks Ilia for the v2 review! Here is the v3 of this IOMMU support for GK20A series. Changes since v2: - Cleaner changes for ltc - Fixed typos in gk20a instmem IOMMU comments Changes since v1: - Add missing else condition in ltc - Remove extra flags that slipped into nouveau_display.c and nv84_fence.c. Original cover letter: Patches 1-3 make the presence of a RAM device optional, and remove

Hi Jean-Philippe, please find some comments below. On 17/11/17 19:52, Jean-Philippe Brucker wrote: > The virtio IOMMU is a para-virtualized device, allowing to send IOMMU > requests such as map/unmap over virtio-mmio transport without emulating > page tables. This implementation handle ATTACH, DETACH, MAP and UNMAP handles > requests. > > The bulk of the code is to create

With linux-next-2017-12-14, I get a crash when nouveau is loaded by systemd-udevd. [ 12.050625] Unable to handle kernel NULL pointer dereference at virtual address 00000058 [ 12.050627] Mem abort info: [ 12.050628] ESR = 0x96000004 [ 12.050630] Exception class = DABT (current EL), IL = 32 bits [ 12.050631] SET = 0, FnV = 0 [ 12.050632] EA = 0, S1PTW = 0 [ 12.050633] Data

This patch set adds XSM security labels to useful debugging output locations, and fixes some assumptions that all interrupts behaved like GSI interrupts (which had useful non-dynamic IDs). It also cleans up the policy build process and adds an example of how to use the user field in the security context. Debug output: [PATCH 01/10] xsm: Add security labels to event-channel dump [PATCH 02/10] xsm:

Hi, Generally the the imported buffers which has memory type TTM_PL_TT are mapped as small pages probably due to lack of big page allocation. But the platform device which also use memory type TTM_PL_TT, like GK20A, can *allocate* big page though the IOMMU hardware inside the SoC. This is a try to map the imported buffers as big pages in GMMU by the platform IOMMU. With some preparation work to

...tdev->iommu.pgshift -= 1; > } > > - ret = iommu_attach_device(tdev->iommu.domain, dev); > + ret = iommu_attach_group(tdev->iommu.domain, tdev->iommu.group); > if (ret) > goto free_domain; > > @@ -140,19 +141,21 @@ nvkm_device_tegra_probe_iommu(struct nvkm_device_tegra *tdev) > (1ULL << tdev->func->iommu_bit) >> > tdev->iommu.pgshift, 1); > if (ret) > -...

...use -h and --csv options together.")); /* virt-df has two modes. If the user didn't specify any drives, * then we do the df on every libvirt guest. That's the if-clause @@ -274,9 +265,8 @@ main (int argc, char *argv[]) err = start_threads (max_threads, g, df_work); free_domains (); #else - fprintf (stderr, _("%s: compiled without support for libvirt.\n"), - guestfs_int_program_name); - exit (EXIT_FAILURE); + error (EXIT_FAILURE, 0, + _("compiled without support for libvirt.")); #endif } else {...

Wherever we had code which did: if (something_bad) { perror (...); exit (EXIT_FAILURE); } replace this with use of the error(3) function: if (something_bad) error (EXIT_FAILURE, errno, ...); The error(3) function is supplied by glibc, or by gnulib on platforms which don't have it, and is much more flexible than perror(3). Since we already use error(3), there seems to be

libguestfs has used double and triple underscores in identifiers. These aren't valid for global names in C++. (http://stackoverflow.com/a/228797) These large but completely mechanical patches change the illegal identifiers to legal ones. Rich.