Displaying 8 results from an estimated 8 matches for "frame_point".
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frame_pointer
2006 May 23
4
[LLVMdev] Spilling register and frame indices
...ackSlot
3. At later stage, frame indices are replaced by calling to
MRegisterInfo::eliminateFrameIndex.
This works for me, but there's slight problem. The target does not have
"register + contant" addressing mode, so accessing frame index should be
done like this:
some_register = frame_pointer + offset
...... [some_register]
Since frame index eliminations happens after register allocation, I must
make sure 'some_register' does not participate in normal register
allocation.
That approach sounds suboptimal. By "reserving" one register we can already
cause som...
2006 May 23
0
[LLVMdev] Spilling register and frame indices
...indices are replaced by calling to
> MRegisterInfo::eliminateFrameIndex.
>
> This works for me, but there's slight problem. The target does not have
> "register + contant" addressing mode, so accessing frame index should be
> done like this:
>
> some_register = frame_pointer + offset
> ...... [some_register]
>
> Since frame index eliminations happens after register allocation, I must
> make sure 'some_register' does not participate in normal register
> allocation.
Right.
> That approach sounds suboptimal. By "reserving" o...
2012 Feb 14
3
ftrace_enabled set to 1 on bootup, slow downs with CONFIG_FUNCTION_TRACER in virt environments?
Hey,
I was running some benchmarks (netserver/netperf) where the init script just launched
the netserver and nothing else and was concerned to see the performance not up to par.
This was an HVM guest running with PV drivers.
If I compile the kernel without CONFIG_FUNCTION_TRACER it is much better - but it was
my understanding that the tracing code does not impact the machine unless it is
2014 Nov 10
2
[LLVMdev] RFC: How to represent SEH (__try / __except) in LLVM IR
...2* %r, align 4
> br label %__try.cont
>
> __try.cont: ; preds = %__except,
> %entry
> %2 = load i32* %r, align 4
> ret i32 %2
> }
>
> define internal i32 @"\01?filt$0 at 0@safe_div@@"(i8* %exception_pointers,
> i8* %frame_pointer) {
> entry:
> %0 = bitcast i8* %exception_pointers to i32**
> %1 = load i32** %0, align 8
> %2 = load i32* %1, align 4
> %cmp = icmp eq i32 %2, -1073741676
> %conv = zext i1 %cmp to i32
> ret i32 %conv
> }
>
> declare i32 @__C_specific_handler(...)
>
&...
2009 Jan 31
2
Re: Debugging Xen via serial console
Hi,
kdb: to debug xen hypervisor, could also debug guests
gdbsx: to debug PV/HVM linux guests
The tree is : http://xenbits.xensource.com/ext/debuggers.hg
See README-dbg. You''ll need to setup serial access for kdb.
Thanks,
Mukesh
>
> Hi Dan,
>
> I''m currently using your version of ssplitd as it is. I haven''t tried
> kdb. For some reason I
2013 Sep 13
10
[PATCH RFC 0/8] xen/arm: initial cubieboard2 support.
See http://www.gossamer-threads.com/lists/xen/devel/297170 for some
information on how to get this going.
I''ve rebased and addressed the review comments.
As before several of the patches are not to be applied because they can
be done better using infrastructure from Julien''s "Allow Xen to boot
with a raw Device Tree" patch. They are included for completeness.
With
2014 Nov 13
2
[LLVMdev] RFC: How to represent SEH (__try / __except) in LLVM IR
...at 0@safe_div@@" to i8*)
store i32 0, i32* %r, align 4
br label %__try.cont
__try.cont: ; preds = %__except, %entry
%2 = load i32* %r, align 4
ret i32 %2
}
define internal i32 @"\01?filt$0 at 0@safe_div@@"(i8* %exception_pointers, i8* %frame_pointer) {
entry:
%0 = bitcast i8* %exception_pointers to i32**
%1 = load i32** %0, align 8
%2 = load i32* %1, align 4
%cmp = icmp eq i32 %2, -1073741676
%conv = zext i1 %cmp to i32
ret i32 %conv
}
declare i32 @__C_specific_handler(...)
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2013 Sep 20
20
[PATCH v3 0/7] support for cubieboard2 / sunxi processors
See http://www.gossamer-threads.com/lists/xen/devel/297170 for some
information on how to get this going.
I''ve rebased and addressed the review comments.
With this rebase I''ve picked up some patches from Julien which were
required to do things properly, so the gic v7 and device blacklisting
patches have been changed to use the proper mechanisms.
Previously I was able to boot