search for: fpsw

...nstructions for a sub-target Hi Ram, of course I can share the patch with you as soon as I have put it up for review. As far as I'm aware, the bugfix should be relatively version-agnostic, so you should not have too much trouble backporting it. The solution basically works like this: * Model FPSW (the FPU status word) as a register. * Add ISel patterns for the FCOM*, FNSTSW and SAHF instructions. * During Legalize/Lowering, build a node sequence to transport the comparison result from FPSW into EFLAGS. The patch itself is already finished, but I want to add a few test cases before submitti...

Hello there, I recently started working on the LLVM backend for a target that doesn't support x87 instructions. Currently, I am in the process of completely disabling some x87 instructions such as fcomi, fcompi,... for a specific sub-target. I also do not have SSE enabled for my sub-target, and llvm resorts to fcomi* instructions for FP compare instructions. Is there a way to bypass the

Hi Matthias, I am a fourth year undergraduate student with some knowledge working on code generation, but with the java backend (committer at an Apache project) and have C++ as my primary language. What I've done so far? ----- 1. I've created an account on bugzilla 2. studying LLVM ProgrammersManual 3. studying LLVM CodingStandards Help ---- 1. trying to setup `llvm-core` and `clang`

I am new to the LLVM backends, I am wondering how instruction selection is done in LLVM backends, I looked at the .td files in Target/X86, they all seem to be small and do not deal with common X86 instructions, i.e. mov, push, pop, etc. Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL:

We really have been trying to keep in mind that LLVM needs to support multiple front ends, which may be implementing different language standards. As much as possible, I’ve been trying to let the IEEE 754 spec drive my thinking about this, though I’ll admit that on a few points I’ve use the C99 spec as a sort of reference interpretation of IEEE 754. LLVM’s IRBuilder has been recently updated to