search for: fpsr

...constraint '0'. >> My question is, is this legal. LLVM complains about the size difference >> (32 vs 64), but it is the same register (ax). >> Works on x86. >> >> %42 = call i64 asm sideeffect "syscall\0A\09", >> "={ax},0,{di},~{dirflag},~{fpsr},~{flags}"(i64 231, i64 %41) nounwind >> ; <i64> [#uses=2] >> >> -Rich > > Can you give a complete testcase? Running the following through > "llvm-as | llc -march=x86-64" works just fine: > define void @a() { > call i64 asm sideeffect...

...i = i->begin(), be = i->end(); bi != be; ++bi){ std::vector<const Type*> asm_arguments; FunctionType *asm_type = FunctionType::get(Type::VoidTy, asm_arguments, false); InlineAsm* au = new InlineAsm(asm_type ???, "isync","~{dirflag},~{fpsr},~{flags}",true); //CallInst* ae = new CallInst(au ??); //Works fine AllocaInst* ai = new AllocaInst(Type::Int16Ty); Instruction *pi = bi; pi->getParent()->getInstList().insert(pi, ai); } Te...

The following fails on x86_64 because of the output constraint '0'. My question is, is this legal. LLVM complains about the size difference (32 vs 64), but it is the same register (ax). Works on x86. %42 = call i64 asm sideeffect "syscall\0A\09", "={ax},0,{di},~{dirflag},~{fpsr},~{flags}"(i64 231, i64 %41) nounwind ; <i64> [#uses=2] -Rich

...>>> My question is, is this legal. LLVM complains about the size difference >>> (32 vs 64), but it is the same register (ax). >>> Works on x86. >>> >>> %42 = call i64 asm sideeffect "syscall\0A\09", >>> "={ax},0,{di},~{dirflag},~{fpsr},~{flags}"(i64 231, i64 %41) nounwind >>>          ; <i64> [#uses=2] >>> >>> -Rich >> >> Can you give a complete testcase?  Running the following through >> "llvm-as | llc -march=x86-64" works just fine: >> define void @a() { &...

...s, which > FunctionType do I need for Inlineasm? > If I understand it right, I need a call instruction to insert the > new produced InlineAsm? > > Thanks for help Inline asm works like a "callee". So for: call void asm sideeffect "isync", "~{dirflag},~{fpsr},~{flags}"() nounwind The thing your calling has type "void()*". You just pass "void()" into the InlineAsm ctor. -Chris > , > > Michael > > for (BasicBlock::iterator bi = i->begin(), be = i->end(); bi != be; + > +bi){ > std::vector<con...

...64 because of the output constraint '0'. > My question is, is this legal. LLVM complains about the size difference > (32 vs 64), but it is the same register (ax). > Works on x86. > > %42 = call i64 asm sideeffect "syscall\0A\09", > "={ax},0,{di},~{dirflag},~{fpsr},~{flags}"(i64 231, i64 %41) nounwind >          ; <i64> [#uses=2] > > -Rich Can you give a complete testcase? Running the following through "llvm-as | llc -march=x86-64" works just fine: define void @a() { call i64 asm sideeffect "syscall\0A\09", "={a...

Hello, Most of the IR language is correctly explained; but with inline assembly I feel alone at some point: define i32 @main(i32 %argc, i8** %argv) #0 { ... //some uninteresting bloat here call void asm sideeffect "outw %eax, $0", "imr,~{dirflag},~{fpsr},~{flags}"(i32 %8) #2, !srcloc !2 ret i32 0 } I reduced the above code to the offending line containing: "imr,~{dirflag},~{fpsr},~{flags}". How should I interpret this? I found no resource on this over the net. Maybe there are more options like that? Do you have a link explainin...

...static int bar; void _start(void) { asm volatile("movl %0, %%eax" : : "i"(&foo)); asm volatile("movl %0, %%ebx" : : "i"(&bar)); } This produces define void @_start() #0 { call void asm sideeffect "movl $0, %eax", "i,~{dirflag},~{fpsr},~{flags}"(i32* @foo) #1, !srcloc !3 call void asm sideeffect "movl $0, %ebx", "i,~{dirflag},~{fpsr},~{flags}"(i32* @bar) #1, !srcloc !4 ret void } When assembled, I get the expected output 80480a3: b8 b0 90 04 08 mov eax,0x80490b0 80480a8: bb b4 90 04 08...

...set doesn't work in compound expressions.) I'm having trouble figuring out what inline assembly I can emit into the LLVM IR that will work properly. So far, the closest I've gotten is call void asm sideeffect inteldialect "mov eax, offset $0 + $$1, "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32** @"?ptr at Foo@@2PAHA") But that expands to mov eax, offset [?ptr at Foo@@2PAHA] + 1 which ends up incorrectly dereferencing the address first. I haven't found a working combination of code & constraints that will expand to mov eax, offset ?ptr at Foo...

...{ > asm volatile("movl %0, %%eax" : : "i"(&foo)); > asm volatile("movl %0, %%ebx" : : "i"(&bar)); > } > > This produces > define void @_start() #0 { > call void asm sideeffect "movl $0, %eax", "i,~{dirflag},~{fpsr},~{flags}"(i32* @foo) #1, !srcloc !3 > call void asm sideeffect "movl $0, %ebx", "i,~{dirflag},~{fpsr},~{flags}"(i32* @bar) #1, !srcloc !4 > ret void > } > > When assembled, I get the expected output > 80480a3: b8 b0 90 04 08 mov ea...

Hello, In the following code snippet: %tmp49 = call i64 asm "movq %gs:${1:P},$0", "=r,im,,~{fpsr},~{flags}"(i64* @kernel_stack) #6, !dbg !6625, !srcloc !5841 I would expect for the inline asm call to receive two arguments because of the ${1:P} corresponding to a %P1 that will append the $1 to %%gs:. Can someone explain why there is only one argument in this call? Moreover, is there any...

Thanks, but I could not find the imr, dirflag, fpsr constraints here. Just the usual gcc/clang inline assembly constraints. Those one were of my concern, actually :) --  Alex 18.11.2015, 17:11, "David Siegel" <agnat at icloud.com>: >>  On 18.11.2015, at 16:28, AlexandreFressange via llvm-dev <llvm-dev at lists.llvm.org&...

...t then I can't use -simplifycfg, -jump-threading, ... as is. Here is an example: %160 = add i64 %158, %159 ; <i64> [#uses=1] %161 = sub i64 %160, %startHash.0 ; <i64> [#uses=5] tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags},~{memory}"() nounwind %fp73 = call i8* @llvm.frameaddress(i32 0) ; <i8*> [#uses=1] %sp74 = call i8* @llvm.stacksave() ; <i8*> [#uses=1] call fastcc void @Function1(i8* %sp74, i8* %fp73) nounwind %162 = call i32 (i32, ...)* @Function2(i32 0) ; &l...

...v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" define i32 @main() nounwind uwtable { entry: %retval = alloca i32, align 4 store i32 0, i32* %retval call void asm sideeffect ".long 0x12345678", "~{dirflag},~{fpsr},~{flags}"() nounwind, !srcloc !0 ret i32 0 } !0 = metadata !{i32 20} -- And I want to know which LLVM API should I use to generate " call void asm sideeffect ".long 0x12345678", "~{dirflag},~{fpsr},~{flags}"() nounwind, !srcloc !0" ? Thanks!! --------------...

...++bi){ std::vector<const Type*> asm_arguments; asm_arguments.push_back(Type::VoidTy); FunctionType *asm_type = FunctionType::get(Type::VoidTy, asm_arguments, false); InlineAsm* au = new InlineAsm(asm_type ???, "isync","~{dirflag},~{fpsr},~{flags}",true); //CallInst* ae = new CallInst(au ??); //Works fine AllocaInst* ai = new AllocaInst(Type::Int16Ty); Instruction *pi = bi; pi->getParent()->getInstList().insert(pi, ai); } Von...

...calling convention LLVM doesn't understand. It takes its input operand on the x87 stack as ST0, which it pops off of the stack before returning. The return value is given in EDX:EAX. In effect, I need to call it like this: %1 = call i64 asm "call __ftol2", "=A,{st},~{dirflag},~{fpsr},~{flags}" (double %x) nounwind but with the added consideration that the input operand is popped by the call, so the callee can't emit its own fstp instruction afterward. LLVM inline asm doesn't appear to be capable of communicating this. In #llvm it was suggested to write a custom i...

...'t understand. > It takes its input operand on the x87 stack as ST0, which it pops off > of the stack before returning. The return value is given in EDX:EAX. > In effect, I need to call it like this: > > %1 = call i64 asm "call __ftol2", > "=A,{st},~{dirflag},~{fpsr},~{flags}" (double %x) nounwind > > but with the added consideration that the input operand is popped by > the call, so the callee can't emit its own fstp instruction afterward. > LLVM inline asm doesn't appear to be capable of communicating this. This should work: %1 =...

2012/1/18 Jakob Stoklund Olesen <stoklund at 2pi.dk>: > This should work: > %1 = call i64 asm "call __ftol2", "=A,{st},~{dirflag},~{fpsr},~{flags},~{st}" (double %x) nounwind Thanks Jakob, the ~{st} constraint does the trick. It wasn't clear to me that "clobbers" means "pops" for x87 registers. -Joe

.../crt0.S new file mode 100644 index 0000000..722276e --- /dev/null +++ b/usr/klibc/arch/ia64/crt0.S @@ -0,0 +1,27 @@ + +#include <asm/fpu.h> + + .align 32 + .global _start + + .proc _start + .type _start, at function +_start: + .prologue + .save rp, r0 + + alloc r2 = ar.pfs,0,0,2,0 + movl r3 = FPSR_DEFAULT + ;; + adds out0= 16,sp /* argc pointer */ + movl gp = @gprel(0f) +0: mov r9 = ip + ;; + sub gp = r9, gp /* back-compute gp value */ + + .body + br.call.sptk.few rp = __libc_init + ;; + break 0 /* break miserably if we ever return */ + + .endp _start diff --git a/usr/klib...

...t is the syntax of the inline assembly? i.e. intel, att, ...? The test code is complete mystery to me: ; From test/Assembler/alignstack.II define void @test1() nounwind { ; CHECK: test1 ; CHECK: sideeffect ; CHECK-NOT: alignstack tail call void asm sideeffect "mov", "~{dirflag},~{fpsr},~{flags}"() nounwind ret void ; CHECK: ret } * Presumably "mov" is the inline assembly string, but that isn't going to assemble without arguments -- are arguments append to the string somehow? * Is anyone using the inline assembler? I would really like to see how others are u...