Displaying 2 results from an estimated 2 matches for "formmask".
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formas
2008 Apr 16
0
[LLVMdev] Being able to know the jitted code-size before emitting
...ze, and 3) use of X86-64 extended registers.
> -unsigned Emitter::determineREX(const MachineInstr &MI) {
> - unsigned REX = 0;
> - const TargetInstrDesc &Desc = MI.getDesc();
> -
> - // Pseudo instructions do not need REX prefix byte.
> - if ((Desc.TSFlags & X86II::FormMask) == X86II::Pseudo)
> - return 0;
> - if (Desc.TSFlags & X86II::REX_W)
> - REX |= 1 << 3;
> -
> - unsigned NumOps = Desc.getNumOperands();
> - if (NumOps) {
> - bool isTwoAddr = NumOps > 1 &&
> - Desc.getOperandConstraint(1, TOI::TIED_TO)...
2008 Apr 15
4
[LLVMdev] Being able to know the jitted code-size before emitting
OK, here's a new patch that adds the infrastructure and the
implementation for X86, ARM and PPC of GetInstSize and GetFunctionSize.
Both functions are virtual functions defined in TargetInstrInfo.h.
For X86, I moved some commodity functions from X86CodeEmitter to
X86InstrInfo.
What do you think?
Nicolas
Evan Cheng wrote:
>
> I think both of these belong to TargetInstrInfo. And