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forcedisassemble
2014 Apr 16
2
[LLVMdev] X86 mmx movq disassembler fail
0x0f 0x6f 0xc8
And
0x0f 0x7f 0xc1
Should both be movq % mm0, % mm1. (AT&T)
However, llvm 3.4 at least does not recognise the second variant as being a
valid instruction.
We are currently compiling up latest src incase it has been fixed. If not,
could someone take a look or recommend how to fix?
Lee
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2017 Nov 30
2
PPC64 Disassembler
> But where is the flat set? Maybe I can debug and check what is going on.
The MCInstrDesc are in a table in lib/Target/PowerPC/PPCGenInstrInfo.inc
of your build directory.
> Some additional information:
>
> MCInst opcode: 0x7cb
> Decode Index: 0x1e
I had assumed this would have dissembled to '// Inst #234 = BC' which does
have the branch flag set, but I think that