search for: force_coherent

...36c44..7115927 100644 --- a/drm/nouveau/nouveau_bo.c +++ b/drm/nouveau/nouveau_bo.c @@ -424,13 +424,7 @@ nouveau_bo_map(struct nouveau_bo *nvbo) if (ret) return ret; - /* - * TTM buffers allocated using the DMA API already have a mapping, let's - * use it instead. - */ - if (!nvbo->force_coherent) - ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.mem.num_pages, - &nvbo->kmap); + ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.mem.num_pages, &nvbo->kmap); ttm_bo_unreserve(&nvbo->bo); return ret; @@ -442,12 +436,7 @@ nouveau_bo_unmap(struct nouveau_bo *n...

It has been a couple of months since v4 - apologies for this. v4 has not received many comments, but this version addresses them and makes a new attempt at pushing the critical bit for GK20A and Nouveau on ARM in general. As a reminder, this series addresses the memory coherency issue that we are seeing on ARM platforms. Contrary to x86 which invalidates the PCI caches whenever a write is made by

...v4.8 (which is due to be released in a week), it should get tagged for stable as well. By the way, Alexandre, I believe Martin was reporting issues like this on his TK1 before this change as well. Probably worth investigating - sounds like there's a wider issue with TTM_PL_FLAG_UNCACHED and/or force_coherent. > >> >> Signed-off-by: Karol Herbst <karolherbst at gmail.com> >> --- >> drm/nouveau/include/nvkm/core/device.h | 1 + >> drm/nouveau/nouveau_bo.c | 3 ++- >> drm/nouveau/nvkm/engine/device/pci.c | 1 + >> drm/nouveau/nvkm/engine...

...au_bo.c b/drm/nouveau/nouveau_bo.c index 528bdef..6887d0a 100644 --- a/drm/nouveau/nouveau_bo.c +++ b/drm/nouveau/nouveau_bo.c @@ -209,7 +209,8 @@ nouveau_bo_new(struct drm_device *dev, int size, int align, nvbo->tile_flags = tile_flags; nvbo->bo.bdev = &drm->ttm.bdev; - nvbo->force_coherent = flags & TTM_PL_FLAG_UNCACHED; + if (!nvxx_device(&drm->device)->func->cpu_coherent) + nvbo->force_coherent = flags & TTM_PL_FLAG_UNCACHED; nvbo->page_shift = 12; if (drm->client.vm) { diff --git a/drm/nouveau/nvkm/engine/device/pci.c b/drm/nouveau/nvkm/engine/...

Another revision of this patchset critical for GK20A to operate. Previous attempts were exclusively using either TTM's regular page allocator or the DMA API one. Both have their advantages and drawbacks: the page allocator is fast but requires explicit synchronization on non-coherent architectures, whereas the DMA allocator always returns coherent memory, but is also slower, creates a

...*drm = nouveau_bdev(nvbo->bo.bdev); > + struct nouveau_device *device = nouveau_dev(drm->dev); > + struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm; > + int i; > + > + if (!ttm_dma) > + return; > + > + if (nv_device_is_cpu_coherent(device) || nvbo->force_coherent) > + return; Is the is_cpu_coherent check really required? On coherent platforms the sync_for_foo should be a noop. It's the dma api's job to encapsulate this knowledge so that drivers can be blissfully ignorant. The explicit is_coherent check makes this a bit leaky. And same comment t...

...887d0a 100644 > --- a/drm/nouveau/nouveau_bo.c > +++ b/drm/nouveau/nouveau_bo.c > @@ -209,7 +209,8 @@ nouveau_bo_new(struct drm_device *dev, int size, int align, > nvbo->tile_flags = tile_flags; > nvbo->bo.bdev = &drm->ttm.bdev; > > - nvbo->force_coherent = flags & TTM_PL_FLAG_UNCACHED; > + if (!nvxx_device(&drm->device)->func->cpu_coherent) > + nvbo->force_coherent = flags & TTM_PL_FLAG_UNCACHED; > > nvbo->page_shift = 12; > if (drm->client.vm) { > diff --git a/drm/...

...uveau_bo *nvbo) +{ + struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev); + struct nouveau_device *device = nouveau_dev(drm->dev); + struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm; + int i; + + if (!ttm_dma) + return; + + if (nv_device_is_cpu_coherent(device) || nvbo->force_coherent) + return; + + if (nv_device_is_pci(device)) { + for (i = 0; i < ttm_dma->ttm.num_pages; i++) + pci_dma_sync_single_for_device(device->pdev, + ttm_dma->dma_address[i], PAGE_SIZE, + PCI_DMA_TODEVICE); + } else { + for (i = 0; i < ttm_dma->ttm.num_pages; i++) + dma_sync...

...veau_device *device = nouveau_dev(drm->dev); > >>+ struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm; > >>+ int i; > >>+ > >>+ if (!ttm_dma) > >>+ return; > >>+ > >>+ if (nv_device_is_cpu_coherent(device) || nvbo->force_coherent) > >>+ return; > > > >Is the is_cpu_coherent check really required? On coherent platforms the > >sync_for_foo should be a noop. It's the dma api's job to encapsulate this > >knowledge so that drivers can be blissfully ignorant. The explicit > >is_cohe...

...ased in a > week), it should get tagged for stable as well. > > By the way, Alexandre, I believe Martin was reporting issues like this > on his TK1 before this change as well. Probably worth investigating - > sounds like there's a wider issue with TTM_PL_FLAG_UNCACHED and/or > force_coherent. Yes, it may be indeed related. I need to sync with Martin to understand his exact repro case.

...bdev); >> + struct nouveau_device *device = nouveau_dev(drm->dev); >> + struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm; >> + int i; >> + >> + if (!ttm_dma) >> + return; >> + >> + if (nv_device_is_cpu_coherent(device) || nvbo->force_coherent) >> + return; > > Is the is_cpu_coherent check really required? On coherent platforms the > sync_for_foo should be a noop. It's the dma api's job to encapsulate this > knowledge so that drivers can be blissfully ignorant. The explicit > is_coherent check makes this a b...

...or notifier memory... worth checking. > > > > > > > > > > > > Hm, looks like we should be passing in TTM_PL_FLAG_UNCACHED for the > > > > > > notifier, which should cause nouveau_bo to do the right thing (by > > > > > > setting force_coherent=true in this environment): > > > > > > > > > > > > ret = nouveau_bo_new(&drm->client, 4096, 0x1000, TTM_PL_FLAG_VRAM, > > > > > > 0, 0x0000, NULL, NULL, &disp->sync); > > > > > > > > > > > >...

...atic int > diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.h b/drivers/gpu/drm/nouveau/nouveau_bo.h > index 38f9d8350963..c47fcdf80ade 100644 > --- a/drivers/gpu/drm/nouveau/nouveau_bo.h > +++ b/drivers/gpu/drm/nouveau/nouveau_bo.h > @@ -17,6 +17,7 @@ struct nouveau_bo { > bool force_coherent; > struct ttm_bo_kmap_obj kmap; > struct list_head head; > + struct list_head io_reserve_lru; > > /* protected by ttm_bo_reserve() */ > struct drm_file *reserved_by; > @@ -92,6 +93,8 @@ int nouveau_bo_validate(struct nouveau_bo *, bool interruptible, >...

...int > diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.h b/drivers/gpu/drm/nouveau/nouveau_bo.h > index 38f9d8350963..c47fcdf80ade 100644 > --- a/drivers/gpu/drm/nouveau/nouveau_bo.h > +++ b/drivers/gpu/drm/nouveau/nouveau_bo.h > @@ -17,6 +17,7 @@ struct nouveau_bo { > bool force_coherent; > struct ttm_bo_kmap_obj kmap; > struct list_head head; > + struct list_head io_reserve_lru; > > /* protected by ttm_bo_reserve() */ > struct drm_file *reserved_by; > @@ -92,6 +93,8 @@ int nouveau_bo_validate(struct nouveau_bo *, bool int...

Hi guys, I've already send this out in September last year, but only got a response from Daniel. Could you guys please test this and tell me what you think about it? Basically I'm trying to remove all driver specific features from TTM which don't need to be inside the framework. Thanks, Christian.

...ttm.io_reserve_mutex); } static int diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.h b/drivers/gpu/drm/nouveau/nouveau_bo.h index 38f9d8350963..c47fcdf80ade 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.h +++ b/drivers/gpu/drm/nouveau/nouveau_bo.h @@ -17,6 +17,7 @@ struct nouveau_bo { bool force_coherent; struct ttm_bo_kmap_obj kmap; struct list_head head; + struct list_head io_reserve_lru; /* protected by ttm_bo_reserve() */ struct drm_file *reserved_by; @@ -92,6 +93,8 @@ int nouveau_bo_validate(struct nouveau_bo *, bool interruptible, bool no_wait_gpu); void nouveau_bo_sync_for_d...

...ttm.io_reserve_mutex); } static int diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.h b/drivers/gpu/drm/nouveau/nouveau_bo.h index aecb7481df0d..ae90aca33fef 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.h +++ b/drivers/gpu/drm/nouveau/nouveau_bo.h @@ -18,6 +18,7 @@ struct nouveau_bo { bool force_coherent; struct ttm_bo_kmap_obj kmap; struct list_head head; + struct list_head io_reserve_lru; /* protected by ttm_bo_reserve() */ struct drm_file *reserved_by; @@ -96,6 +97,8 @@ int nouveau_bo_validate(struct nouveau_bo *, bool interruptible, bool no_wait_gpu); void nouveau_bo_sync_for_d...

...tatic int > diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.h b/drivers/gpu/drm/nouveau/nouveau_bo.h > index 62930d834fba..b8a17bc19d7b 100644 > --- a/drivers/gpu/drm/nouveau/nouveau_bo.h > +++ b/drivers/gpu/drm/nouveau/nouveau_bo.h > @@ -17,6 +17,7 @@ struct nouveau_bo { > bool force_coherent; > struct ttm_bo_kmap_obj kmap; > struct list_head head; > + struct list_head io_reserve_lru; > > /* protected by ttm_bo_reserve() */ > struct drm_file *reserved_by; > @@ -92,6 +93,8 @@ int nouveau_bo_validate(struct nouveau_bo *, bool interruptible, > bool n...

...ttm.io_reserve_mutex); } static int diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.h b/drivers/gpu/drm/nouveau/nouveau_bo.h index 62930d834fba..b8a17bc19d7b 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.h +++ b/drivers/gpu/drm/nouveau/nouveau_bo.h @@ -17,6 +17,7 @@ struct nouveau_bo { bool force_coherent; struct ttm_bo_kmap_obj kmap; struct list_head head; + struct list_head io_reserve_lru; /* protected by ttm_bo_reserve() */ struct drm_file *reserved_by; @@ -92,6 +93,8 @@ int nouveau_bo_validate(struct nouveau_bo *, bool interruptible, bool no_wait_gpu); void nouveau_bo_sync_for_d...

Hi guys, I already tried this a few month ago, but since I don't have NVidia hardware its rather hard to test for me (need to get some ordered). Dave brought up the topic that we should probably try to move the handling into Nouveau once more, so I tried to fix the problem Ben reported and rebased on top of current drm-misc-next. Dave can you test this? At least in theory the approach