Displaying 7 results from an estimated 7 matches for "fnstcw16m".
2006 Jun 26
2
[LLVMdev] Mapping bytecode to X86
...ake it produce correct code.
Consider this program here:
int main(int argc, char ** argv) {
int i, j, sum;
i = argv[0][0];
j = argv[0][1];
sum = (i + j) * j;
printf("Sum = %d\n", sum);
}
that maps to this llvm bytecode:
entry (0xa785590, LLVM BB @0xa77ebf8):
FNSTCW16m <fi#0>, 1, %NOREG, 0
MOV8mi <fi#0>, 1, %NOREG, 1, 2
FLDCW16m <fi#0>, 1, %NOREG, 0
%reg1024 = MOV32rm <fi#-2>, 1, %NOREG, 0
%reg1025 = MOV32rm %reg1024, 1, %NOREG, 0
%reg1026 = MOVSX32rm8 %reg1025, 1, %NOREG, 0
%reg1027 = MOVSX3...
2011 Apr 01
0
[LLVMdev] Assert in VerifySDNode
...TOMOR64_DAG,
ATOMXOR64_DAG,
ATOMAND64_DAG,
ATOMNAND64_DAG,
ATOMSWAP64_DAG,
// LCMPXCHG_DAG, LCMPXCHG8_DAG - Compare and swap.
LCMPXCHG_DAG,
LCMPXCHG8_DAG,
// VZEXT_LOAD - Load, scalar_to_vector, and zero extend.
VZEXT_LOAD,
// FNSTCW16m - Store FP control world into i16 memory.
FNSTCW16m,
/// FP_TO_INT*_IN_MEM - This instruction implements FP_TO_SINT with the
/// integer destination in memory and a FP reg source. This corresponds
/// to the X86::FIST*m instructions and the rounding mode change stuff....
2011 Apr 01
2
[LLVMdev] Assert in VerifySDNode
> -----Original Message-----
> From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu]
> On Behalf Of Duncan Sands
> Sent: Thursday, March 31, 2011 7:43 PM
> To: llvmdev at cs.uiuc.edu
> Subject: Re: [LLVMdev] Assert in VerifySDNode
>
> Hi Micah,
>
> > assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
>
> you
2006 Jun 23
2
[LLVMdev] Help with error in pass
...m below, the following error message is
produced:
.c ----------------------| .bc ---------------------------------
| Live Outs: EAX
|
#include <stdio.h> | entry (0x8d4c6c0, LLVM BB @0x8d46970):
| FNSTCW16m <fi#0>, 1, %NOREG, 0
int main() { | MOV8mi <fi#0>, 1, %NOREG, 1, 2
return 0; | FLDCW16m <fi#0>, 1, %NOREG, 0
} | %reg1024 = MOV32r0
| %EAX = MOV32rr %reg1024
| R...
2006 Jun 24
0
[LLVMdev] Help with error in pass
...ng in, for example?
-Chris
> .c ----------------------| .bc ---------------------------------
> | Live Outs: EAX
> |
> #include <stdio.h> | entry (0x8d4c6c0, LLVM BB @0x8d46970):
> | FNSTCW16m <fi#0>, 1, %NOREG, 0
> int main() { | MOV8mi <fi#0>, 1, %NOREG, 1, 2
> return 0; | FLDCW16m <fi#0>, 1, %NOREG, 0
> } | %reg1024 = MOV32r0
> | %EAX = MOV32rr %reg1024
>...
2006 Jun 24
1
[LLVMdev] Help with error in pass
...gt;
> > .c ----------------------| .bc ---------------------------------
> > | Live Outs: EAX
> > |
> > #include <stdio.h> | entry (0x8d4c6c0, LLVM BB @0x8d46970):
> > | FNSTCW16m <fi#0>, 1, %NOREG, 0
> > int main() { | MOV8mi <fi#0>, 1, %NOREG, 1, 2
> > return 0; | FLDCW16m <fi#0>, 1, %NOREG, 0
> > } | %reg1024 = MOV32r0
> > | %EAX = MOV32rr %re...
2007 Jun 26
3
[LLVMdev] Live Intervals Question
For the x86-64 target, I tried compiling a simple hello world. I don't
understand the live interval information.
Here's the machine instructions as dumped by LiveIntervalAnalysis:
********** MACHINEINSTRS **********
file hello.c line 3 b:
0 FNSTCW16m <fi#0>, 1, %NOREG, 0
FNSTCW16m <fi#0> 1 %mreg(0) 0
4 MOV8mi <fi#0>, 1, %NOREG, 1, 2
MOV8mi <fi#0> 1 %mreg(0) 1 2
8 FLDCW16m <fi#0>, 1, %NOREG, 0
FLDCW16m <fi#0> 1 %mreg(0) 0
12 ADJCALLSTACKDOWN 0, %ESP<imp-def>, %ESP<imp-use>
ADJCALLSTACKDOWN 0 %mreg(...