search for: fnmsubs

I have been doing some playing with the patterns that define complex instructions, and I saw a behavior that doesn't look right. I think its a bug in the PPC backend. The 32-bit PPC .td file defines a pattern for the fnmsubs instruction like this: def : Pat<(fsub F4RC:$B, (fmul F4RC:$A, F4RC:$C)), (FNMSUBS F4RC:$A, F4RC:$C, F4RC:$B)>, Requires<[FPContractions]>; The unique feature of this parttern is that it maps a pair of LLVM IR instructions into a single PPC instruction. d...

Hi, We have implemented the rcp instruction generation for X86 target architecture. We have introduced a flag -fp-rcp flag which controls the generatation of X86 rcp instruction generation. We have observed minor effects on precision and hence hve put these transformations under the mentioned flag. Note that -fp-rcp is only enabled with -enable-unsafe-fp-math flag presently. Moreover we have

Hi, We have implemented the rsqrt instruction generation for X86 target architecture. We have introduced a flag -fp-rsqrt flag which controls the generatation of X86 rsqrt instruction generation. We have observed minor effects on precision due to rsqrt and hence has put these transformations under the mentioned flag. Note that -fp-rsqrt is only enabled with -enable-unsafe-fp-math flag presently.