search for: fneg_su

Displaying 2 results from an estimated 2 matches for "fneg_su".

2012 May 11
2
[LLVMdev] TableGen pattern for negated operand
...d operand. My target asm syntax allows the following transform: FNEG r8, r5 MUL r6, r8, r9 to MUL r6, -r5, r9 Is there a Pattern<> syntax that would allow matching *any* opcode (or even some subset), not just MUL, with a FNEG'd operand? I expect I can define a PatFrag: def fneg_su : PatFrag<(ops node:$val), (fneg node:$val), [{ return N->hasOneUse(); }]>; and then use that in each target instruction patten in XXXInstrInfo.td, such as: def XXX_MUL : XXXInst< (outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2), "mul $dst, -$src1, $src2", [(set...
2012 May 11
0
[LLVMdev] TableGen pattern for negated operand
...rcat(opc, " $dst, $src1, $src2")", [(set $dst, (op GPR32:$src1, GPR32:$src2))]>; def _fneg_rr : Instruction<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2), "!strcat(opc, " $dst, -$src1, $src2")", [(set $dst, (op (fneg_su GPR32:$src1), GPR32:$src2)))]>; } > I expect I can > define a PatFrag: > > def fneg_su : PatFrag<(ops node:$val), (fneg node:$val), [{ return > N->hasOneUse(); }]>; AFAIK, you don't need to verify for hasOneUse() because the instruction selector will do it for yo...