search for: fmstat

...f a <= b and neither is NaN. // Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // DEFINE_COMPILERRT_FUNCTION(__lesf2vfp) fmsr s14, r0 // move from GPR 0 to float register fmsr s15, r1 // move from GPR 1 to float register fcmps s14, s15 fmstat movls r0, #1 // set result register to 1 if equal movhi r0, #0 bx lr If I read this right, the high bits of r0 are always cleared (by the movhi) while the low bits are conditionally set to 1 (by the movls), but there's nothing to clear the r0's low bits in the false case. Is this a...

.... >From an user point of view, flags have two different uses 1) Forcing a value to be in a particular register. 2) As a hack when a machine state is not made explicit. For example, in the ARM backend I haven't declared the "FP status" and the "status" registers. So the FMSTAT instruction needs a flag. It should be possible to remove all uses of 2 by a writing a more complete description. Maybe the uses of 1 could be abstracted with a higher lever interface... > If you have a specific question, I'm more than happy to answer it, > > -Chris Rafael

...s the InFlag argument of an insn to be the same register as the OutFlag of another instruction? > 2) As a hack when a machine state is not made explicit. For example, > in the ARM backend I haven't declared the "FP status" and the > "status" > registers. So the FMSTAT instruction needs a flag. OK. Their usage as a mean to tarnsfer a status directly is more clear now. The insn with incoming flag basically reuses the outflag of another insn. If I understand correctly, any intruction that can change status (usually a status register, or are there any other examp...

On Mon, 9 Oct 2006, Roman Levenstein wrote: > But your previous explanations were so good that I implemented in my > backend last week almost the same that you've done now in the > X86InstrSSE.td. I even introduced isCommutable parameter to indicate > this property, just as you did. So, by now integer arithmetic and > general purpose instructions are implemented. I'm working

...passsed > > // like 32-bit ints > > // > > DEFINE_COMPILERRT_FUNCTION(__lesf2vfp) > > fmsr s14, r0 // move from GPR 0 to float register > > fmsr s15, r1 // move from GPR 1 to float register > > fcmps s14, s15 > > fmstat > > movls r0, #1 // set result register to 1 if equal > > movhi r0, #0 > > bx lr > > If I read this right, the high bits of r0 are always cleared (by the > movhi) while the low bits are conditionally set to 1 (by the movls), but > th...