Displaying 2 results from an estimated 2 matches for "fmsr".
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2010 Apr 08
1
[LLVMdev] compiler-rt's arm vfp o<= implementation
...t. This is lesf2vfp.S in compiler-rt, and it has
this code:
// extern int __lesf2vfp(float a, float b);
//
// Returns one iff a <= b and neither is NaN.
// Uses Darwin calling convention where single precision arguments are passsed
// like 32-bit ints
//
DEFINE_COMPILERRT_FUNCTION(__lesf2vfp)
fmsr s14, r0 // move from GPR 0 to float register
fmsr s15, r1 // move from GPR 1 to float register
fcmps s14, s15
fmstat
movls r0, #1 // set result register to 1 if equal
movhi r0, #0
bx lr
If I read this right, the high bits of r0 are always cleared (by the movhi)
while the low bit...
2010 Apr 09
0
[LLVMdev] compiler-rt's arm vfp o<= implementation
...__lesf2vfp(float a, float b);
>
> //
>
> // Returns one iff a <= b and neither is NaN.
>
> // Uses Darwin calling convention where single precision arguments are passsed
>
> // like 32-bit ints
>
> //
>
> DEFINE_COMPILERRT_FUNCTION(__lesf2vfp)
>
> fmsr s14, r0 // move from GPR 0 to float register
>
> fmsr s15, r1 // move from GPR 1 to float register
>
> fcmps s14, s15
>
> fmstat
>
> movls r0, #1 // set result register to 1 if equal
>
> movhi r0, #0
>
>...