search for: fmaxnm

> It seems inevitable. For the floating point version, please make it very > clear what the behavior of max(-0,+0) and related cases are. Along these lines, AArch64 has an instruction "FMAXNM". It returns the maximum if neither value is NaN, but returns the number if just one value is NaN. This is in addition to an "FMAX" which propagates NaNs. I suspect you'll just want to consider this as an "oh yes, make sure that the result is NaN if either input is" ad...

...ed, Dec 5, 2012 at 10:43 PM, Tim Northover <t.p.northover at gmail.com> wrote: >> It seems inevitable. For the floating point version, please make it very >> clear what the behavior of max(-0,+0) and related cases are. > > Along these lines, AArch64 has an instruction "FMAXNM". It returns the > maximum if neither value is NaN, but returns the number if just one > value is NaN. This is in addition to an "FMAX" which propagates NaNs. > > I suspect you'll just want to consider this as an "oh yes, make sure > that the result is NaN if...

...them in a normative clause in the next revision. I can’t really argue against adopting them either, because they do make perfect sense. Some notes on how these definitions align with existing architectures of interest: ARMv8: 1. FMIN / FMAX implement the new minimum / maximum exactly. 2. FMINNM / FMAXNM implement minimumNumber / maximumNumber if we can prove no sNaNs are present. If sNaN may be present, we need to canonicalize each argument first. X86: 1. AFAIK there’s no trivial instruction for minimum / maximum, because MINxx / MAXxx return the second argument if either is NaN. So this will loo...

On Dec 5, 2012, at 8:26 AM, "Redmond, Paul" <paul.redmond at intel.com> wrote: > I have been working on a patch to add support for max/min reductions in LoopVectorize. One of the comments that came up in review is that the implementation could be simplified (and less fragile) if max and min intrinsics were recognized rather than looking for compare-select sequences. > >

I have been working on a patch to add support for max/min reductions in LoopVectorize. One of the comments that came up in review is that the implementation could be simplified (and less fragile) if max and min intrinsics were recognized rather than looking for compare-select sequences. The suggestion was to change compare-selects into max and min intrinsic calls during instcombine. The

Hi, The specification for the llvm.minnum/llvm.maxnum intrinsics is too unclear right now to usefully optimize. There are two problems. First the expected behavior for signaling NaNs needs to be clarified. Second, whether the returned value is expected to be canonicalized (as if by llvm.canonicalize). Currently according to the LangRef: Follows the IEEE-754 semantics for minNum, which also