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...-----Original Message----- > > From: rengolin at gmail.com [mailto:rengolin at gmail.com] On Behalf Of > > Renato Golin > > Sent: Friday, November 09, 2012 6:27 PM > > To: Sebastien DELDON-GNB > > Cc: JF Bastien; llvmdev at cs.uiuc.edu > > Subject: Re: [LLVMdev] fmac generation for cortex-a9 > > > > Hi Sebastien, > > > > ARMv7-M has VFMA and LLVM's "triple" is far from perfect. > > > > Wikipedia tells me NovaThor can also be A15, or STE could have cramped a > > VFPv4 in it? ;) Or possibly, your code never...

Hi Renato, You're right it's VMLA/VMLS that are generated. Still don't understand what drives generation for Cortex-A9. I was using fmac for floating point MAC not for fused MAC. Than I realized that we spoke about fma instead of fmac. So back to the original problem why when using -mcpu=cortex-a9 VMLA/VMLS are not generated and when I use -mtriple=armv7-eabi they are ? Best Regards Seb ________________________________________ De...

...code is working ! Seb > -----Original Message----- > From: rengolin at gmail.com [mailto:rengolin at gmail.com] On Behalf Of > Renato Golin > Sent: Friday, November 09, 2012 6:27 PM > To: Sebastien DELDON-GNB > Cc: JF Bastien; llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] fmac generation for cortex-a9 > > Hi Sebastien, > > ARMv7-M has VFMA and LLVM's "triple" is far from perfect. > > Wikipedia tells me NovaThor can also be A15, or STE could have cramped a > VFPv4 in it? ;) Or possibly, your code never branches into the VFMA. > Man...

...Maybe someone from ARM can answer the question ? > > > > Seb > > > > From: JF Bastien [mailto:jfb at google.com] > Sent: Friday, November 09, 2012 5:36 PM > To: Sebastien DELDON-GNB > Cc: Anitha Boyapati; llvmdev at cs.uiuc.edu > > > Subject: Re: [LLVMdev] fmac generation for cortex-a9 > > > > AFAIK A9 doesn't have VFPv4 or AdvSIMDv2, so it doesn't have VFMA. I don't > know what LLVM does, but it shouldn't emit VFMA when you target A9. VMLA > isn't a fused multiply-add, it's a multiply followed by an add and has &...

...rks when I use LLVM to generate fma (using llc -mtriple=armv7-eabi). Maybe someone from ARM can answer the question ? Seb From: JF Bastien [mailto:jfb at google.com] Sent: Friday, November 09, 2012 5:36 PM To: Sebastien DELDON-GNB Cc: Anitha Boyapati; llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] fmac generation for cortex-a9 AFAIK A9 doesn't have VFPv4 or AdvSIMDv2, so it doesn't have VFMA. I don't know what LLVM does, but it shouldn't emit VFMA when you target A9. VMLA isn't a fused multiply-add, it's a multiply followed by an add and has different latency as well as p...

...abi enables it while -mcpu=cortex-a9 seems to disable it ? Seb > -----Original Message----- > From: Anitha Boyapati [mailto:anitha.boyapati at gmail.com] > Sent: Thursday, November 08, 2012 10:22 AM > To: Sebastien DELDON-GNB > Cc: llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] fmac generation for cortex-a9 > > On 8 November 2012 13:56, Sebastien DELDON-GNB > <sebastien.deldon at st.com> wrote: > > Hi all, > > > > > > > > > > > > I've a .ll code that use double precision fmul/fadd or fmul/fsub. When > > I comp...

...to disable it ? > > Seb > > > -----Original Message----- > > From: Anitha Boyapati [mailto:anitha.boyapati at gmail.com] > > Sent: Thursday, November 08, 2012 10:22 AM > > To: Sebastien DELDON-GNB > > Cc: llvmdev at cs.uiuc.edu > > Subject: Re: [LLVMdev] fmac generation for cortex-a9 > > > > On 8 November 2012 13:56, Sebastien DELDON-GNB > > <sebastien.deldon at st.com> wrote: > > > Hi all, > > > > > > > > > > > > > > > > > > I've a .ll code that use double precis...

Hi all, I've a .ll code that use double precision fmul/fadd or fmul/fsub. When I compile it using llc -mcpu=cortex-a9 I couldn't get vmla/vmls generated even using -fp-contract=fast, but when I use option -mtriple=armv7-eabi instead of -mcpu=cortex-a9 fused mac are generated. Can someone explain me why ? Thanks for your answers Seb -------------- next part -------------- An HTML

On 8 November 2012 13:56, Sebastien DELDON-GNB <sebastien.deldon at st.com> wrote: > Hi all, > > > > > > I’ve a .ll code that use double precision fmul/fadd or fmul/fsub. When I > compile it using llc –mcpu=cortex-a9 I couldn’t get vmla/vmls generated even > using –fp-contract=fast, but when I use option –mtriple=armv7-eabi instead > of –mcpu=cortex-a9 fused mac

...ions which takes the accumulator register (acc) as an implicit operand. This is different from typical three or four operands mac instructions. As an illustration, the following instructions compute a + b x c + e x f + g *h. initacc a //initialize the accumulator register fmac b c fmac e f fmac g h mfacc i //move result from the accumulator register to register i A straightforward implementation is to find the patterns in selectionDAG and turn them into mac instructions chains like above. One chain of mac instructions (with initacc at the beg...

Hi, OpenSSH 5.7 is almost ready for release, so we would appreciate testing on as many platforms and systems as possible. This release contains a couple of large and intrusive features and changes and quite a number of bug fixes. Snapshot releases for portable OpenSSH are available from http://www.mindrot.org/openssh_snap/ The OpenBSD version is available in CVS HEAD: