Displaying 13 results from an estimated 13 matches for "flt32".
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2017 Nov 15
2
[PATCH] nouveau/codegen: dump tgsi floats as hex values
Hi,
yeah in the long run showing both in an ordered manner would be a nice
thing to have! That would include patching the output and the tgsi
parser (who wants to delete half the output to parse it again e.g. with
nouveau_compiler).
I can image an output similar to the one below:
IMM[5] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000} ^ IMM[5] FLT32 {0x00000019, 0x0000000f, 0x00000005, 0x0000001e}
IMM[6] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000} = IMM[6] FLT32 {0x0000001e, 0x00000005, 0x0000000a, 0x00000014}
IMM[7] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000...
2017 Nov 14
3
[PATCH] nouveau/codegen: dump tgsi floats as hex values
Printing without this could lead to the following output, while the values are
not exactly zero:
IMM[5] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000}
IMM[6] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000}
IMM[7] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000}
when printing the values as hex, we can now see the differences:
IMM[5] FLT32 {0x00000019, 0x0000000f, 0x00000005, 0x0000001e...
2017 Nov 16
0
[PATCH] nouveau/codegen: dump tgsi floats as hex values
...n showing both in an ordered manner would be a nice thing
> to have! That would include patching the output and the tgsi parser (who
> wants to delete half the output to parse it again e.g. with
> nouveau_compiler).
>
> I can image an output similar to the one below:
>
> IMM[5] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000} ^ IMM[5] FLT32
> {0x00000019, 0x0000000f, 0x00000005, 0x0000001e}
> IMM[6] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000} = IMM[6] FLT32
> {0x0000001e, 0x00000005, 0x0000000a, 0x00000014}
> IMM[7] FLT32 { 0.0000, 0.0000,...
2017 Nov 15
0
[PATCH] nouveau/codegen: dump tgsi floats as hex values
...Maybe there could be a second option to display as both
float and hex?
Reviewed-by: Pierre Moreau <pierre.morrow at free.fr>
On 2017-11-14 — 15:11, Tobias Klausmann wrote:
> Printing without this could lead to the following output, while the values are
> not exactly zero:
> IMM[5] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000}
> IMM[6] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000}
> IMM[7] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000}
>
> when printing the values as hex, we can now see the differences:
> IMM[5] FLT32 {0x00000019, 0x0000000...
2013 Oct 04
1
[Bug 70130] New: unable to compile fragment shader program
..., PERSPECTIVE
DCL IN[3], TEXCOORD[2], PERSPECTIVE
DCL IN[4], TEXCOORD[3], PERSPECTIVE
DCL IN[5], GENERIC[0], PERSPECTIVE
DCL OUT[0], COLOR
DCL SAMP[0]
DCL SAMP[1]
DCL SAMP[2]
DCL SAMP[3]
DCL SAMP[4]
DCL SAMP[5]
DCL CONST[19]
DCL CONST[0..2]
DCL CONST[4..13]
DCL TEMP[0]
DCL TEMP[1..13], LOCAL
IMM[0] FLT32 { 0.1250, 2.0000, 0.8000, 0.1000}
IMM[1] FLT32 { 7.5000, -0.5000, 0.0000, 1.0000}
IMM[2] FLT32 {16384.0000, 4098.0000, -1.0000, 4094.0000}
IMM[3] FLT32 { 0.0025, 0.0500, 0.9990, 0.0010}
IMM[4] FLT32 { 0.3333, 7.0000, 0.5000, 300.0000}
IM...
2016 Oct 02
2
[PATCH] nv50/ir: Propagate third immediate src when folding OP_MAD
...ort b128 # o[0x0] $r0q (8)
With patch:
0: ld u32 $r2 c0[0x0] (8)
1: add ftz f32 $r0 $r2 1.000000 (8)
2: mov f32 $r3 $r1 (8)
3: mov u32 $r1 $r2 (8)
4: export b128 # o[0x0] $r0q (8)
[1]:
VERT
PROPERTY NEXT_SHADER FRAG
DCL OUT[0], GENERIC[0]
DCL CONST[0]
DCL TEMP[0..1], LOCAL
IMM[0] FLT32 { 0.0078, -1.0000, 0.0000, 0.5000}
IMM[1] FLT32 { 1.0000, 0.0000, 65535.0000, 0.0100}
0: MOV TEMP[0].xyz, CONST[0].xxxx
39: MAD TEMP[1], CONST[20].xxxx, IMM[1].yyyy, IMM[1].xyyy
41: ADD TEMP[1], TEMP[0], TEMP[1]
208: MOV OUT[0], TEMP[1]
211: END
>
>> +...
2016 Oct 02
0
[PATCH] nv50/ir: Propagate third immediate src when folding OP_MAD
...0[0x0] (8)
> 1: add ftz f32 $r0 $r2 1.000000 (8)
> 2: mov f32 $r3 $r1 (8)
> 3: mov u32 $r1 $r2 (8)
> 4: export b128 # o[0x0] $r0q (8)
>
>
> [1]:
> VERT
> PROPERTY NEXT_SHADER FRAG
> DCL OUT[0], GENERIC[0]
> DCL CONST[0]
> DCL TEMP[0..1], LOCAL
> IMM[0] FLT32 { 0.0078, -1.0000, 0.0000, 0.5000}
> IMM[1] FLT32 { 1.0000, 0.0000, 65535.0000, 0.0100}
> 0: MOV TEMP[0].xyz, CONST[0].xxxx
> 39: MAD TEMP[1], CONST[20].xxxx, IMM[1].yyyy, IMM[1].xyyy
> 41: ADD TEMP[1], TEMP[0], TEMP[1]
> 208: MOV OUT[0], TEMP[1]
> 211...
2016 Oct 02
1
[PATCH] nv50/ir: Propagate third immediate src when folding OP_MAD
...8)
>> 2: mov f32 $r3 $r1 (8)
>> 3: mov u32 $r1 $r2 (8)
>> 4: export b128 # o[0x0] $r0q (8)
>>
>>
>> [1]:
>> VERT
>> PROPERTY NEXT_SHADER FRAG
>> DCL OUT[0], GENERIC[0]
>> DCL CONST[0]
>> DCL TEMP[0..1], LOCAL
>> IMM[0] FLT32 { 0.0078, -1.0000, 0.0000, 0.5000}
>> IMM[1] FLT32 { 1.0000, 0.0000, 65535.0000, 0.0100}
>> 0: MOV TEMP[0].xyz, CONST[0].xxxx
>> 39: MAD TEMP[1], CONST[20].xxxx, IMM[1].yyyy, IMM[1].xyyy
>> 41: ADD TEMP[1], TEMP[0], TEMP[1]
>> 208: MOV O...
2016 Oct 02
2
[PATCH] nv50/ir: Propagate third immediate src when folding OP_MAD
Previously we'd end up with an unnecessary mov for the thirs immediate value.
total instructions in shared programs : 851881 -> 851864 (-0.00%)
total gprs used in shared programs : 110295 -> 110295 (0.00%)
total local used in shared programs : 1020 -> 1020 (0.00%)
local gpr inst bytes
helped 0 0 17 17
2014 May 01
13
[Bug 78161] New: [NV96] Artifacts in output of fragment program containing not unrolled loops with conditional break
https://bugs.freedesktop.org/show_bug.cgi?id=78161
Priority: medium
Bug ID: 78161
Assignee: nouveau at lists.freedesktop.org
Summary: [NV96] Artifacts in output of fragment program
containing not unrolled loops with conditional break
Severity: normal
Classification: Unclassified
OS: Linux (All)
2016 Jun 03
13
[Bug 96355] New: Performance: extra&costly SSBO validation even when SSBO aren't used
https://bugs.freedesktop.org/show_bug.cgi?id=96355
Bug ID: 96355
Summary: Performance: extra&costly SSBO validation even when
SSBO aren't used
Product: Mesa
Version: git
Hardware: Other
OS: All
Status: NEW
Severity: normal
Priority: medium
Component:
2015 Jan 11
2
[PATCH] nv50/ir: Handle OP_CVT when folding constant expressions
On Sun, Jan 11, 2015 at 5:48 PM, Tobias Klausmann
<tobias.johannes.klausmann at mni.thm.de> wrote:
>
>
> On 11.01.2015 23:12, Ilia Mirkin wrote:
>>
>> On Sun, Jan 11, 2015 at 5:08 PM, Tobias Klausmann
>> <tobias.johannes.klausmann at mni.thm.de> wrote:
>>>
>>>
>>> On 11.01.2015 22:54, Ilia Mirkin wrote:
>>>>
2015 Jun 07
43
[Bug 90887] New: PhiMovesPass in register allocator broken
https://bugs.freedesktop.org/show_bug.cgi?id=90887
Bug ID: 90887
Summary: PhiMovesPass in register allocator broken
Product: Mesa
Version: git
Hardware: All
OS: All
Status: NEW
Severity: normal
Priority: medium
Component: Drivers/DRI/nouveau
Assignee: nouveau at