search for: flag_schedule_insn

...ance with little changes in either. 4. The ILP scheduler has the worst execution times on FP2006 and the second > worst spill counts, although it is the default on x86-64. Is this > surprising? BTW, Dragon Egg sets the scheduler to source. On Line 368 in > Backend.cpp, we find: > if (!flag_schedule_insns) > Args.push_back("--pre-RA-sched=source"); > This looks like someone ran a similar test and did the sensible thing. How that reflects with Clang, or how important it is to be the default, I don't know. This is the same discussion as the optimization levels, and what passe...

...'t it? Does this result surprise you? > > 4. The ILP scheduler has the worst execution times on FP2006 and the second worst spill counts, although it is the default on x86-64. Is this surprising? BTW, Dragon Egg sets the scheduler to source. On Line 368 in Backend.cpp, we find: > if (!flag_schedule_insns) > Args.push_back("--pre-RA-sched=source"); > > Here are the details of our results: > > Spill Counts > --------------- > CPU2006 has a total of 47448 functions, out of which 10363 functions (22%) have spills. If we break this down by FP and INT, we’ll see t...

...gram order, isn't it? Does this result surprise you? 4. The ILP scheduler has the worst execution times on FP2006 and the second worst spill counts, although it is the default on x86-64. Is this surprising? BTW, Dragon Egg sets the scheduler to source. On Line 368 in Backend.cpp, we find: if (!flag_schedule_insns)     Args.push_back("--pre-RA-sched=source");   Here are the details of our results: Spill Counts --------------- CPU2006 has a total of 47448 functions, out of which 10363 functions (22%) have spills. If we break this down by FP and INT, we’ll see that 42% of the functions in FP2006...

...'t it? Does this result surprise you? > > 4. The ILP scheduler has the worst execution times on FP2006 and the second worst spill counts, although it is the default on x86-64. Is this surprising? BTW, Dragon Egg sets the scheduler to source. On Line 368 in Backend.cpp, we find: > if (!flag_schedule_insns) >    Args.push_back("--pre-RA-sched=source");  > > Here are the details of our results: > > Spill Counts > --------------- > CPU2006 has a total of 47448 functions, out of which 10363 functions (22%) have spills. If we break this down by FP and INT, we’ll see th...

On Jul 2, 2013, at 2:35 PM, Ghassan Shobaki <ghassan_shobaki at yahoo.com> wrote: > Thank you for the answers! We are currently trying to test the MI scheduler. We are using LLVM 3.3 with Dragon Egg 3.3 on an x86-64 machine. So far, we have run one SPEC CPU2006 test with the MI scheduler enabled using the option -fplugin-arg-dragonegg-llvm-option='-enable-misched:true' with -O3.

...'s register pressure reduction behavior?   4. The ILP scheduler has the worst execution times on FP2006 and the second worst spill counts, although it is the default on x86-64. Is this surprising? BTW, Dragon Egg sets the scheduler to source. On Line 368 in Backend.cpp, we find: > >if (!flag_schedule_insns) >    Args.push_back("--pre-RA-sched=source"); This looks like someone ran a similar test and did the sensible thing. How that reflects with Clang, or how important it is to be the default, I don't know. This is the same discussion as the optimization levels, and what passes shou...

Thank you for the answers! We are currently trying to test the MI scheduler. We are using LLVM 3.3 with Dragon Egg 3.3 on an x86-64 machine. So far, we have run one SPEC CPU2006 test with the MI scheduler enabled using the option -fplugin-arg-dragonegg-llvm-option='-enable-misched:true' with -O3. This enables the machine scheduler in addition to the SD scheduler. We have verified this by