search for: fkf_ispcrel

...o Infos[AArch64::NumTargetFixupKinds] = { + // This table *must* be in the order that the fixup_* kinds are defined in + // AArch64FixupKinds.h. + // + // Name Offset (bits) Size (bits) Flags + { "fixup_a64_ld_prel", 0, 32, MCFixupKindInfo::FKF_IsPCRel }, + { "fixup_a64_adr_prel", 0, 32, MCFixupKindInfo::FKF_IsPCRel }, + { "fixup_a64_adr_prel_page", 0, 32, MCFixupKindInfo::FKF_IsPCRel }, + { "fixup_a64_add_lo12", 0, 32, 0 }, + { "fixup_a64_ldst8_lo12", 0, 32, 0 }, + { "fixup_a6...

...type OPERAND_PCREL, and uses EncoderMethod "getJumpTargetOpValue" defined in EpiphanyMCCodeEmitter. If this method gets MCExpr, it creates fixup, and I can see this fixup in debug. - Fixup is called fixup_Epiphany_PCREL24, and is defined in EpiphanyFixupKinds and EpiphanyAsmBackend, with FKF_IsPCRel flag. Can someone please tell me if I am missing something? The source itself can be found at https://github.com/upcFrost/Epiphany/tree/Call_support Debug output on pastebin: http://pastebin.com/8uKRv0qK Thanks, Petr P.S. sorry for messy code, I knew nothing about LLVM backends when I s...

This attempts to address http://llvm.org/bugs/show_bug.cgi?id=18220 It also fixes a test which was requiring the *wrong* output. I'm relatively happy with this part, and it even solves most of the hard part of feature request for .code16 in bug 8684 — which was actually why I started prodding at this. But I could do with some help with the 16-bit signed relocation handling, which I've

...uses EncoderMethod > "getJumpTargetOpValue" defined in EpiphanyMCCodeEmitter. If this method > gets MCExpr, it creates fixup, and I can see this fixup in debug. > > - Fixup is called fixup_Epiphany_PCREL24, and is defined in > EpiphanyFixupKinds and EpiphanyAsmBackend, with FKF_IsPCRel flag. > > > > Can someone please tell me if I am missing something? > > > Are you sure there's actually a problem? On x86, for example: > > $ echo "int f(); int g() { return f(); }" | clang -x c - -o /tmp/a.o -c && > objdump -d /tmp/a.o > >...