Displaying 2 results from an estimated 2 matches for "fixup_hexagon_b9_pcrel".
2019 Jun 30
6
[hexagon][PowerPC] code regression (sub-optimal code) on LLVM 9 when generating hardware loops, and the "llvm.uadd" intrinsic.
...// %entry.old
{
p0 = cmp.gtu(r0,r1); if (p0.new) jump:nt .LBB0_5
r2 = r0
allocframe(#0)
} // encoding: [A,0x41'A',A,0x15'A',0x00,0x3c,0x02,0x70]
// fixup A - offset: 0, value: .LBB0_5, kind: fixup_Hexagon_B9_PCREL
// %bb.1: // %entry.old
{
r0 = sub(r1,r0)
} // encoding: [0x00,0xc1,0x20,0xf3]
{
if (p0.new) jump:nt .LBB0_5
p0 = cmp.gt(r0,#399)
} // encoding: [A,0x48'A',A,0x5c'A',0xe0,0xf1,0x40,0x...
2019 Jul 01
0
[hexagon][PowerPC] code regression (sub-optimal code) on LLVM 9 when generating hardware loops, and the "llvm.uadd" intrinsic.
...r2 = r0
allocframe(#0)
} // encoding: [A,0x41'A',A,0x15'A',0x00,0x3c,0x02,0x70]
// fixup A - offset: 0, value: .LBB0_5, kind: fixup_Hexagon_B9_PCREL
// %bb.1: // %entry.old
{
r0 = sub(r1,r0)
} // encoding: [0x00,0xc1,0x20,0xf3]
{...