Displaying 2 results from an estimated 2 matches for "fixmulhigh".
2014 Mar 13
2
[LLVMdev] Be Careful with Positionally-Encoded Operands (AArch64, Mips, AMDGPU, etc.)
...MachineOpValue(MI, MI.getOperand(2), Fixups, STI);
> > Value |= (op & UINT64_C(31)) << 16;
> > // op: Ra
> > op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
> > Value |= (op & UINT64_C(31)) << 10;
> > Value = fixMulHigh(MI, Value, STI);
> > break;
> > }
> >
> > This may be correct (I have no idea), but even if it is, it seems
> > like an odd way to get this behavior: depending on the fact that,
> > after operands are matched by name, the remaining operands are
> &g...
2014 Mar 13
5
[LLVMdev] Be Careful with Positionally-Encoded Operands (AArch64, Mips, AMDGPU, etc.)
..._C(31)) << 5;
// op: Rm
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: Ra
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 10;
Value = fixMulHigh(MI, Value, STI);
break;
}
This may be correct (I have no idea), but even if it is, it seems like an odd way to get this behavior: depending on the fact that, after operands are matched by name, the remaining operands are matched by position such that they might overlap with those operand...