Displaying 3 results from an estimated 3 matches for "first257".
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2012 Feb 04
4
[LLVMdev] ARMLoadStoreOptimizer bug
...2 LLVM build.
But here's what I'm seeing in the debug output:
# Before ARMLoadStoreOptimizer:
BB#21: derived from LLVM BB %cond.end
Live Ins: %LR %R0 %R1 %R7 %R10 %R11
Predecessors according to CFG: BB#14 BB#18
STRi12 %R7<kill>, %R1, 0, pred:14, pred:%noreg;
mem:ST4[%first257](tbaa=!"int")
%R1<def> = ADDri %R1<kill>, 4, pred:14, pred:%noreg, opt:%CPSR<def>
Bcc <BB#23>, pred:0, pred:%CPSR<kill>
B <BB#22>
Successors according to CFG: BB#23 BB#22
# After ARMLoadStoreOptimizer:
BB#21: derived from LL...
2012 Feb 07
0
[LLVMdev] ARMLoadStoreOptimizer bug
...what I'm seeing in the debug output:
>
> # Before ARMLoadStoreOptimizer:
> BB#21: derived from LLVM BB %cond.end
> Live Ins: %LR %R0 %R1 %R7 %R10 %R11
> Predecessors according to CFG: BB#14 BB#18
> STRi12 %R7<kill>, %R1, 0, pred:14, pred:%noreg; mem:ST4[%first257](tbaa=!"int")
> %R1<def> = ADDri %R1<kill>, 4, pred:14, pred:%noreg, opt:%CPSR<def>
> Bcc <BB#23>, pred:0, pred:%CPSR<kill>
> B <BB#22>
> Successors according to CFG: BB#23 BB#22
>
> # After ARMLoadStoreOpt...
2012 Feb 07
1
[LLVMdev] ARMLoadStoreOptimizer bug
...utput:
> >
> > # Before ARMLoadStoreOptimizer:
> > BB#21: derived from LLVM BB %cond.end
> > Live Ins: %LR %R0 %R1 %R7 %R10 %R11
> > Predecessors according to CFG: BB#14 BB#18
> > STRi12 %R7<kill>, %R1, 0, pred:14, pred:%noreg;
> mem:ST4[%first257](tbaa=!"int")
> > %R1<def> = ADDri %R1<kill>, 4, pred:14, pred:%noreg,
> opt:%CPSR<def>
> > Bcc <BB#23>, pred:0, pred:%CPSR<kill>
> > B <BB#22>
> > Successors according to CFG: BB#23 BB#22
> >...