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2019 Oct 23
2
[cfe-dev] [Openmp-dev] GitHub Migration Starting Now
..., please file a bug and mark it as a > blocker for the github meta-bug. > > Thanks, > Tom > > > > -Tom > > > > _______________________________________________ > > Openmp-dev mailing list > > Openmp-dev at lists.llvm.org > > https://protect2.fireeye.com/v1/url?k=50544e46-0c8045f8-50540edd-86742d02e7e2-96dccc982e4dd0fc&q=1&e=1c901fd6-5221-4af3-a0ab-4a124a098487&u=https%3A%2F%2Flists.llvm.org%2Fcgi-bin%2Fmailman%2Flistinfo%2Fopenmp-dev > > > > _______________________________________________ > cfe-dev mailing list &g...
2019 Sep 14
2
[GSoC 2019] Apply the Clang Static Analyzer to LLVM-based projects - final report
Hello, Le 29/08/2019 à 01:02, Artem Dergachev a écrit : > Yay thx! > > Sylvestre, is there anything i can help you with in order to get the reports page back up? Sorry, it took me a while to get that back but here is the report of r371718: https://llvm.org/reports/scan-build/ > I'd also indeed love to spam people with warnings that they introduced, even if in the form of a
2019 Nov 28
3
Instcombine and bitcast of vector. Wrong CHECKs in cast.ll, miscompile in instcombine?
Hi, In llvm/test/Transforms/InstCombine/cast.ll there is a test like this: target datalayout = "E-p:64:64:64-p1:32:32:32-p2:64:64:64-p3:64:64:64- a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64- v64:64:64-v128:128:128-n8:16:32:64" [...] define <3 x i32> @test60(<4 x i32> %call4) { ; CHECK-LABEL: @test60( ; CHECK-NEXT: [[P10:%.*]] = shufflevector
2020 Jul 08
4
[RFC] Saturating left shift intrinsics
Hello, This is an RFC for adding intrinsics which perform saturating signed/unsigned left shift. There is currently a patch on Phabricator here: https://reviews.llvm.org/D83216 The intrinsics are of the form i32 @llvm.sshl.sat.i32(i32, i32) i32 @llvm.ushl.sat.i32(i32, i32) <4 x i32> @llvm.sshl.sat.v4i32(<4 x i32>, <4 x i32>) <4 x i32>
2020 Jun 08
2
Nested instruction patterns rejected by GlobalISel when having registers in Defs
...e modify TableGen to only consider outs as the result of interest when processing the patterns? Gabriel Hjort Åkerlund _______________________________________________ LLVM Developers mailing list <mailto:llvm-dev at lists.llvm.org> llvm-dev at lists.llvm.org <https://protect2.fireeye.com/v1/url?k=52e18446-0c413e28-52e1c4dd-86b1886cfa 64-f424e731a80348bd&q=1&e=238953c8-f0ec-4510-8c97-620bfb03d5be&u=https%3A%2F %2Flists.llvm.org%2Fcgi-bin%2Fmailman%2Flistinfo%2Fllvm-dev> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev -- --------------------------------...
2020 Jun 04
2
Nested instruction patterns rejected by GlobalISel when having registers in Defs
...interest when processing the patterns? Gabriel Hjort Åkerlund _______________________________________________ LLVM Developers mailing list llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev <https://protect2.fireeye.com/v1/url?k=52e18446-0c413e28-52e1c4dd-86b1886cfa 64-f424e731a80348bd&q=1&e=238953c8-f0ec-4510-8c97-620bfb03d5be&u=https%3A%2F %2Flists.llvm.org%2Fcgi-bin%2Fmailman%2Flistinfo%2Fllvm-dev> -- ---------------------------------------------------------------------- Dominik Montada...
2020 Jun 16
3
Codifying our Brace rules-
I'm with Matt on this one. I much prefer the approach of ALWAYS use braces for ifs and for loops, even if they're not needed, for basically the same reasons as he put. The number of times I've added a statement inside an if without braces and forget to add them is annoyingly high, especially as it's not always an obvious error upfront. Similarly, being involved in a downstream
2020 Jan 02
2
u2f seed
...ts master secret and the application parameter to wrap the key for the key handle. -- Christian "naddy" Weisgerber naddy at mips.inka.de _______________________________________________ openssh-unix-dev mailing list openssh-unix-dev at mindrot.org https://protect2.fireeye.com/v1/url?k=c4371812-988227ab-c4373207-0cc47adc5fce-56c2948a65834232&q=1&e=0f45e6c0-4544-44ae-af8d-3d64af881ea7&u=https%3A%2F%2Flists.mindrot.org%2Fmailman%2Flistinfo%2Fopenssh-unix-dev
2019 Oct 22
4
GitHub Migration Starting Now
Hi, We're getting ready to start migrating to GitHub. SVN will be moved to read-only now and we'll begin the process of turning on GitHub commit access. I'll send an email when we're done. -Tom
2020 Aug 07
4
Saturating float-to-int casts
I have encountered a need for float-to-int casts that saturate to min/max when the value is out of the range of the target type. It seems that there is no intrinsic to do this, currently, but on IRC it was pointed out that a patch [1] has been proposed to implement this functionality in exactly the way that I was looking for. It looks like the discussion has died out but I was hoping maybe to
2020 Jun 24
2
Loop vectorization and unsafe floating point math
Hi llvm-dev! We are doing some fuzzy testing using C program generators, and one question that came up when generating a program with both floating point arithmetic and loop pragmas was; Is the loop vectorizer really allowed to vectorize a loop when it can't prove that it is safe to reorder fp math, even if there is a loop pragma that hints about a preferred width. When reading here
2019 Nov 27
2
ELF string table access in backend
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2019 Sep 06
3
[RFC] changing variable naming rules
...e sure that that won't break anything.  5. Give a heads-up and submit a sweeping change to the entire LLVM. I'd like to submit a sweeping change after LLVM migrates to GitHub to minimize confusion. [1] http://lists.llvm.org/pipermail/llvm-dev/2019-February/130083.html [2] https://protect2.fireeye.com/url?k=ea62499f-b6f04480-ea620904-0cc47ad93db4-ecd933b4f617d714&q=1&u=https%3A%2F%2Fgithub.com%2Fllvm%2Fllvm-project%2Ftree%2Fmaster%2Flld [3] https://protect2.fireeye.com/url?k=3251f903-6ec3f41c-3251b998-0cc47ad93db4-9f9d4ccc78551a27&q=1&u=https%3A%2F%2Fgithub.com%2Fllvm%2Fllvm...
2020 Jun 04
2
Nested instruction patterns rejected by GlobalISel when having registers in Defs
Hi, I am in the process of porting our target to GlobalISel, and have encountered a problem. Nearly all instructions in our instruction set make modifications to a CC register, and hence are defined as follows: let ..., Defs = [CCReg] in def shfts_a32_imm7: Instruction<(outs OurRC:$dst), ...>; What's more, many of these instructions have patterns where the instruction itself
2007 Apr 18
1
[Bridge] Bridging multiple tap interfaces
Is it possible to bridge multiple "tap" interfaces in Linux? When two tap interfaces are bridged together they are unable to "see" each other but they can bridge to external Ethernet interfaces or the hosts IP attached on the bridge. I saw some mention in the mailing list archives on bridging two user space processes but it didn't seem to have any conclusion. I also
2019 Oct 31
5
RFC: On non 8-bit bytes and the target for it
...also notice when things break and would also pitch in and generalize it further so that it in the end works for all users. /Mikael > > -Chris > > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > https://protect2.fireeye.com/v1/url?k=8c219edf-d0a845d0-8c21de44-0cc47ad93e1a-b9df048a1ecb44b1&q=1&e=95c12902-023a-4b29-913c-87a467fe82d9&u=https%3A%2F%2Flists.llvm.org%2Fcgi-bin%2Fmailman%2Flistinfo%2Fllvm-dev
2019 Sep 27
3
What about multiple MachineMemOperands in one MI (BranchFolding/MachineInstr::mayAlias)?
On 9/27/19 7:33 AM, Matt Arsenault via llvm-dev wrote: > > >> On Sep 27, 2019, at 09:07, Björn Pettersson A via llvm-dev >> <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: >> >> Obviously we do not store into two locations (it is still a single >> two byte store). >> So is it (always) correct to interpret the list of
2020 Jun 24
2
Target specific named address spaces
Hi, Is there a way to implement named address spaces with clang/llvm as it is possible with gcc ? We would like to have our own named address space that would be recognized by the frontend. Thanks in advance! Regards, Sebastien
2020 Jan 10
4
u2f / libfido2 version
Hi, So I finally have time to test the u2f support but so far I haven't been very successful, Specifically, current HEAD has SSH_SK_VERSION_MAJOR 0x00040000 and I can't seem to find a matching libfido2 version, current HEAD of Yubico/libfido2 is 0x00020000 Is there a more up to date libfido2 or a particular commit of openssh-portable I should be using? thanks Sean
2020 Sep 01
2
[RFC] [DebugInfo] Using DW_OP_entry_value within LLVM IR
...sal > > The idea of this RFC is to introduce an idea/discussion of using the > DW_OP_entry_value not only at the end of LLVM pipeline (within > LiveDebugValues). There are cases it could be useful at IR level; i.e. for > unused arguments (please take a look into > https://protect2.fireeye.com/v1/url?k=16c671b9-4876ec21-16c63122-861fcb972bfc-e4488a7f57de3412&q=1&e=4f293e8b-6a1f-4a80-9de1-30399c7295a6&u=https%3A%2F%2Freviews.llvm.org%2FD85012 > ); I believe there are a lot of cases where an IR pass drops/cuts variable’s > debug value info where an entry value can fa...