search for: fire_ring

...splay.c | 2 ++ 4 files changed, 17 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.h b/drivers/gpu/drm/nouveau/nouveau_dma.h index 9498c45..399436f 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dma.h +++ b/drivers/gpu/drm/nouveau/nouveau_dma.h @@ -128,6 +128,14 @@ FIRE_RING(struct nouveau_channel *chan) } static inline void +RING_WAIT(struct nouveau_channel *chan) +{ + nouveau_wait_until(chan->dev, 2000000000ULL, + NV50_PDISPLAY_USER_GET(0), 0xffffffff, + (chan->dma.cur << 2) + chan->pushbuf_base); +} + +static inline void WIND_RING(struct nouve...

...port all engines to new engine module format" changed IB size calculation to be less wasteful, but didn't take into account already existing off-by-one bugs :). So: - ib_max is the last entry, so we need to +1 when calculating number of free entries - nv50_dma_wait already does +1 (for FIRE_RING), so we don't need another +1 on nouveau_gem_ioctl_pushbuf side - there are 512 allocated IB entries (and it needs to be round number), so we can accept at most 511 entries from userspace (we need one for FIRE_RING) - fortunately userspace already flushes at 511, so nr_push check change w...

...+retry: + avail = chan->pushbuf->remaining; + avail -= 10 + 1 + (chan->pushbuf->remaining >> 11); /* for the BEGIN_RING_NIs */ + avail *= prim->vpp; + vc = util_split_primitive(avail, &prim->mode, &prim->start, prim->end, &prim->flags); + if(!vc) + { + FIRE_RING(chan); + goto retry; + } + + BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, nvgl_primitive(prim->mode)); + + if(oldflags & SPLIT_BEGIN_WITH_FIRST) + nv30_primitive_start_vertex(prim); + + ++prim->chunk; + return vc; +} + +static inline void +nv30_primitive_en...

- This avoids problematic "reloc'ed while mapped" messages and some associated corruption as well. Signed-off-by: Maarten Maathuis <madman2003 at gmail.com> --- src/gallium/drivers/nouveau/nouveau_screen.c | 21 +++++++++++++++++++++ src/gallium/drivers/nouveau/nouveau_screen.h | 3 +++ src/gallium/drivers/nouveau/nouveau_stateobj.h | 13 +++++++++++++

A cleanup of nouveau_dma_wait(): extract a sub-function and eliminate two variables to improve readability. No functional changes. Signed-off-by: Pekka Paalanen <pq at iki.fi> --- drivers/gpu/drm/nouveau/nouveau_dma.c | 72 ++++++++++++++++++--------------- 1 files changed, 39 insertions(+), 33 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.c

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.../nouveau_fence.c @@ -44,6 +44,7 @@ struct nouveau_fence { uint32_t sequence; bool signalled; + unsigned long emitted_at; void (*work)(void *priv, bool signalled); void *priv; @@ -172,6 +173,7 @@ nouveau_fence_emit(struct nouveau_fence *fence) } OUT_RING (chan, fence->sequence); FIRE_RING(chan); + fence->emitted_at = jiffies; return 0; } @@ -230,7 +232,8 @@ __nouveau_fence_signalled(void *sync_obj, void *sync_arg) int __nouveau_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr) { - unsigned long timeout = jiffies + (3 * DRM_HZ); + struct nouveau_fence *fence...

...copied before continuing > > diff --git a/src/drmmode_display.c b/src/drmmode_display.c > index 3010396..e152e7f 100644 > --- a/src/drmmode_display.c > +++ b/src/drmmode_display.c > @@ -215,6 +215,12 @@ drmmode_fbcon_copy(ScrnInfoPtr pScrn) > exa->DoneCopy(pdpix); > FIRE_RING (pNv->chan); > > + /* wait for completion before continuing, avoids seeing a momentary > + * flash of "corruption" on occasion > + */ > + nouveau_bo_map(pNv->scanout, NOUVEAU_BO_RDWR); > + nouveau_bo_unmap(pNv->scanout); > + > pScreen->DestroyPixm...

...info->var.xres_virtual); OUT_RING(chan, info->var.yres_virtual); - OUT_RING(chan, upper_32_bits(fb->vma->addr)); - OUT_RING(chan, lower_32_bits(fb->vma->addr)); + OUT_RING(chan, upper_32_bits(nfbdev->vma->addr)); + OUT_RING(chan, lower_32_bits(nfbdev->vma->addr)); FIRE_RING(chan); return 0; diff --git a/drivers/gpu/drm/nouveau/nvc0_fbcon.c b/drivers/gpu/drm/nouveau/nvc0_fbcon.c index c0deef4fe727..cb56163ed608 100644 --- a/drivers/gpu/drm/nouveau/nvc0_fbcon.c +++ b/drivers/gpu/drm/nouveau/nvc0_fbcon.c @@ -150,7 +150,6 @@ nvc0_fbcon_accel_init(struct fb_info *info)...

...e : loading a 3500x2500 pixmap in firefox with 64mb vram. After talking a bit more with curro, I started to write a patch. I don't know how bad and wrong it is, there are still so many things I don't understand. It seems it works somehow, meaning OUT_RELOC -> emit_reloc will fail before FIRE_RING -> pushbuf_flush. But enomem failures during pushbuf_flush still happen. And worse, what happens after an OUT_RELOC failure is awful : 1) on nv25, the system freezes for 5 seconds, and after the lower part (a rectangle) of the picture seems to have a wrong offset or something. 2) on nv84 (hacked...

...ORMAT_DMA_NOTIFY, 1); OUT_RING(chan, NvNotify0); + /* Bind NvSw to channel. */ + if (dev_priv->card_type >= NV_50) { + ret = RING_SPACE(chan, 2); + if (ret) + return ret; + BEGIN_RING(chan, NvSubSw, 0, 1); + OUT_RING(chan, NvSw); + } + /* Sit back and pray the channel works.. */ FIRE_RING(chan); diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.h b/drivers/gpu/drm/nouveau/nouveau_dma.h index 04e85d8..3c74902 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dma.h +++ b/drivers/gpu/drm/nouveau/nouveau_dma.h @@ -46,10 +46,11 @@ /* Hardcoded object assignments to subchannels (subchannel i...

...nouveau_notifier_reset(nv40->screen->sync, 0); // BEGIN_RING(curie, 0x1d6c, 1); // OUT_RING(0x5c0); // static int value = 0x23; // BEGIN_RING(curie, 0x1d70, 1); // OUT_RING(value++); BEGIN_RING(curie, NV40TCL_NOTIFY, 1); OUT_RING(0); BEGIN_RING(curie, NV40TCL_NOP, 1); OUT_RING(0); FIRE_RING(NULL); nouveau_notifier_wait_status(nv40->screen->sync, 0, 0, 0); } It seems that NV40TCL_NOTIFY (which must be followed by a nop for some reason) triggers a notification of rendering completion. Furthermore, the card will probably put the value set with 0x1d70 somewhere, where 0x1d6c has...

Please tell me what can't work about this idea. - Introduce concept of "batches", through some kind of marker (tied to fences). - Request buffers up front, userspace does all relocation (avoid teaching the kernel about tiling, etc). - Driver stores state for each batch. - FIRE_RING becomes an ioctl that can fail (imagine backgrounded app holding pinned memory for too long). ==> This means no direct access to put and get. - Memory is pinned for the duration of the batch. It's a rough outline, but i'd like to know what exactly is forcing is to use kernel submission....

...truct nouveau_channel *, u64 addr, int length); */ #define NOUVEAU_DMA_SKIPS (128 / 4) +/* Maximum push buffer size. */ +#define NV50_DMA_PUSH_MAX_LENGTH 0x7fffff + /* Object handles - for stuff that's doesn't use handle == oclass. */ enum { NvDmaFB = 0x80000002, @@ -89,7 +93,7 @@ FIRE_RING(struct nouveau_channel *chan) if (chan->dma.ib_max) { nv50_dma_push(chan, chan->push.addr + (chan->dma.put << 2), - (chan->dma.cur - chan->dma.put) << 2); + (chan->dma.cur - chan->dma.put) << 2, false); } else { WRITE_PUT(chan->d...

...*chan) BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 1); OUT_RING(chan, NvNotify0); + /* Initialise NV_SW */ + ret = RING_SPACE(chan, 2); + if (ret) + return ret; + BEGIN_RING(chan, NvSubSw, 0, 1); + OUT_RING(chan, NvSw); + /* Sit back and pray the channel works.. */ FIRE_RING(chan); diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.h b/drivers/gpu/drm/nouveau/nouveau_dma.h index 04e85d8..dabfd65 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dma.h +++ b/drivers/gpu/drm/nouveau/nouveau_dma.h @@ -46,10 +46,11 @@ /* Hardcoded object assignments to subchannels (subchannel i...

...; #define NOUVEAU_DMA_SKIPS (128 / 4) > > +/* Maximum push buffer size. */ > +#define NV50_DMA_PUSH_MAX_LENGTH 0x7fffff > + > /* Object handles - for stuff that's doesn't use handle == oclass. */ > enum { > NvDmaFB = 0x80000002, > @@ -89,7 +93,7 @@ FIRE_RING(struct nouveau_channel *chan) > > if (chan->dma.ib_max) { > nv50_dma_push(chan, chan->push.addr + (chan->dma.put << 2), > - (chan->dma.cur - chan->dma.put) << 2); > + (chan->...

...truct nouveau_channel *, u64 addr, int length); */ #define NOUVEAU_DMA_SKIPS (128 / 4) +/* Maximum push buffer size. */ +#define NV50_DMA_PUSH_MAX_LENGTH 0x7fffff + /* Object handles - for stuff that's doesn't use handle == oclass. */ enum { NvDmaFB = 0x80000002, @@ -89,7 +93,7 @@ FIRE_RING(struct nouveau_channel *chan) if (chan->dma.ib_max) { nv50_dma_push(chan, chan->push.addr + (chan->dma.put << 2), - (chan->dma.cur - chan->dma.put) << 2); + (chan->dma.cur - chan->dma.put) << 2, true); } else { WRITE_PUT(chan->dm...

- Depth and stencil buffers are supposed to be large enough in general. Signed-off-by: Maarten Maathuis <madman2003 at gmail.com> --- drivers/gpu/drm/nouveau/nouveau_bo.c | 9 ++++----- 1 files changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index e342a41..9fc4bd6 100644 ---

Revised patch set v2. [PATCH 1/8] drm/nouveau: bo read/write wrappers for nv04_crtc.c [PATCH 2/8] drm/nouveau: use bo accessors for push buffers [PATCH 3/8] drm/nouveau: OUT_RINGp - optimize OUT_RING loops [PATCH 4/8] drm/nv50: proper notifier_bo access in nv50_display_vblank_crtc_handler() [PATCH 5/8] drm/nouveau: access fbcon notifier via bo accessors [PATCH 6/8] drm/nouveau: screen_base and

...ine__ unsigned AVAIL_RING(struct nouveau_channel *chan) { return chan->end - chan->cur; //return NULL; } static __inline__ void WAIT_RING(struct nouveau_channel *chan, unsigned size) { if (chan->cur + size > chan->end) nouveau_pushbuf_flush(chan, size); } static __inline__ void FIRE_RING(struct nouveau_channel *chan) { nouveau_pushbuf_flush(chan, 0); } static __inline__ int OUT_RELOC(struct nouveau_channel *chan, struct nouveau_bo *bo, unsigned data, unsigned flags, unsigned vor, unsigned tor) { return nouveau_pushbuf_emit_reloc(chan, chan->cur++, bo, data, 0, flags...