search for: findrepresentativeclass

...128, (sequence "POI%u", 0, 7)>; def VR128 : RegisterClass<"X86", [v4f32, v2f64, v16i8, v8i16, v4i32, v2i64], 128, (add PR128, FR32)>; I have an entry in X86ISelLowering.cpp: addRegisterClass(MVT::i128, &X86::PR128RegClass); and in findRepresentativeClass(): case MVT::i128: RRC = &X86::PR128RegClass; But even though my nodes have MVT::i128 value type, they get allocated to XMM registers. I have, of course, removed i128 from FR128. What am I missing? Thanks, Barbora -- ---------------- Barbora Murinová The University of Edinburgh SK: +4...

...++++------ lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 4 ++-- 3 files changed, 12 insertions(+), 12 deletions(-) commit d3e652d037e3a49598c871912b0ee68acef2d02e Author: Patrik Hägglund <patrik.h.hagglund at ericsson.com> Date: Wed Dec 5 11:47:50 2012 +0100 Change TargetLowering::findRepresentativeClass to take an MVT, instead of EVT. include/llvm/Target/TargetLowering.h | 2 +- lib/CodeGen/SelectionDAG/TargetLowering.cpp | 4 ++-- lib/Target/ARM/ARMISelLowering.cpp | 4 ++-- lib/Target/ARM/ARMISelLowering.h | 2 +- lib/Target/X86/X86ISelLowering.cpp | 4 ++-- l...

...Ty] = RC; } + /// clearRegisterClasses - remove all register classes + void clearRegisterClasses() { + for (unsigned i = 0 ; i<array_lengthof(RegClassForVT); i++) + RegClassForVT[i] = 0; + while (!AvailableRegClasses.empty()) + AvailableRegClasses.pop_back(); + } + /// findRepresentativeClass - Return the largest legal super-reg register class /// of the register class for the specified type and its associated "cost". virtual std::pair<const TargetRegisterClass*, uint8_t> diff --git a/lib/Target/Mips/Mips16ISelLowering.cpp b/lib/Target/Mips/Mips16ISelLowering.cpp i...