Displaying 3 results from an estimated 3 matches for "finalizemachinebundlesid".
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finalizemachinebundles
2012 Mar 29
0
[LLVMdev] VLIWPacketizerList: failing to schedule terminators
...DAG edges will be built for all instructions within the block.
---
Now, regarding bundle creation. The FinalizeMachineBundles pass will "finalize" bundles for you after regalloc. You can enable that in your target config. e.g.
bool MyTargetPassConfig::addFinalizeRegAlloc() {
addPass(FinalizeMachineBundlesID);
}
This does not create bundles, rather it wraps bundles in an extra layer of abstraction by copying all of the MachineOperands into a bundle header. I think we have enough other bundle abstractions that this step could be eliminated, but it's a bootstrapping mechanism that we rely on for now...
2012 Mar 29
2
[LLVMdev] VLIWPacketizerList: failing to schedule terminators
On Thu, Mar 29, 2012 at 02:57:27PM -0500, Sergei Larin wrote:
> Tom,
>
> I do not have your call stack, but packetizer calls
> ScheduleDAGInstrs::buildSchedGraph to create dependency model. If this is
> the first time you use the new MI sched infrastructure (like your target has
> not implemented misched yet) there might be some work needed to implement
> couple target
2012 Mar 30
1
[LLVMdev] VLIWPacketizerList: failing to schedule terminators
...l instructions within the block.
>
> ---
> Now, regarding bundle creation. The FinalizeMachineBundles pass will "finalize" bundles for you after regalloc. You can enable that in your target config. e.g.
>
> bool MyTargetPassConfig::addFinalizeRegAlloc() {
> addPass(FinalizeMachineBundlesID);
> }
>
> This does not create bundles, rather it wraps bundles in an extra layer of abstraction by copying all of the MachineOperands into a bundle header. I think we have enough other bundle abstractions that this step could be eliminated, but it's a bootstrapping mechanism that we...