Displaying 13 results from an estimated 13 matches for "filterclass".
Did you mean:
fileclass
2012 Aug 17
2
[LLVMdev] TableGen related question for the Hexagon backend
...lt;3>;
def Format_predf : IFormat<4>;
Addrr : { Addrr, Addri, Addrr_pt, Addrr_pf, .. , ..}
Addri : { Addrr, Addri, Addri_pt, Addri_pf,..
> Do something like this:
>
> def getPredicatedOpcode : InstrMapping {
> // Only include instructions form the PredRel class.
> let FilterClass = "PredRel";
>
> // Instructions with the same BaseOpcode field form a row.
> let RowFields = ["BaseOpcode"];
>
> // Instructions with the same predicate sense form a column.
> let ColFields = ["PredSense"];
>
> // The key column is...
2012 Aug 20
2
[LLVMdev] TableGen related question for the Hexagon backend
...'ADD', we can have
another transformation like this -
ADD--- ---> ADDtrue -----> ADDtru_new (predicate new form of true)
\-----> ADDfalse -----> ADDfalse_new (predicate new form of false)
// Define Predicate New relation
def getPredNewOpcode : InstrMapping {
let FilterClass = "PredNewRel";
let RowFields = ["BaseOpcode"];
// ColFields is a list of flags/attributes of the instructions.
let ColFields = ["DotNewType", "PredSense"];
// Here 'DotNewType' of the KeyCol is "" and Predsense can be either 'tr...
2012 Aug 17
0
[LLVMdev] TableGen related question for the Hexagon backend
...y translates into
> a unique column into the mapping table.
My point is that you don't need to define additional structure when you can just use the record fields.
>> def getPredicatedOpcode : InstrMapping {
>> // Only include instructions form the PredRel class.
>> let FilterClass = "PredRel";
>>
>> // Instructions with the same BaseOpcode field form a row.
>> let RowFields = ["BaseOpcode"];
>>
>> // Instructions with the same predicate sense form a column.
>> let ColFields = ["PredSense"];
>>
>...
2012 Aug 20
0
[LLVMdev] TableGen related question for the Hexagon backend
...er transformation like this -
>
> ADD--- ---> ADDtrue -----> ADDtru_new (predicate new form of true)
> \-----> ADDfalse -----> ADDfalse_new (predicate new form of false)
>
> // Define Predicate New relation
> def getPredNewOpcode : InstrMapping {
> let FilterClass = "PredNewRel";
>
> let RowFields = ["BaseOpcode"];
>
> // ColFields is a list of flags/attributes of the instructions.
> let ColFields = ["DotNewType", "PredSense"];
>
> // Here 'DotNewType' of the KeyCol is "" and...
2012 Aug 17
0
[LLVMdev] TableGen related question for the Hexagon backend
...s needed. You don't want to be limited to a single 'IFormat' as a column identifier, there can be many different types of relationships between instructions.
Do something like this:
def getPredicatedOpcode : InstrMapping {
// Only include instructions form the PredRel class.
let FilterClass = "PredRel";
// Instructions with the same BaseOpcode field form a row.
let RowFields = ["BaseOpcode"];
// Instructions with the same predicate sense form a column.
let ColFields = ["PredSense"];
// The key column is the unpredicated instructions.
let Ke...
2012 Aug 20
2
[LLVMdev] TableGen related question for the Hexagon backend
...ansformation like this -
>
> ADD--- ---> ADDtrue -----> ADDtru_new (predicate new form of true)
> \-----> ADDfalse -----> ADDfalse_new (predicate new form of
> false)
>
> // Define Predicate New relation
> def getPredNewOpcode : InstrMapping {
> let FilterClass = "PredNewRel";
>
> let RowFields = ["BaseOpcode"];
>
> // ColFields is a list of flags/attributes of the instructions.
> let ColFields = ["DotNewType", "PredSense"];
>
> // Here 'DotNewType' of the KeyCol is "" and...
2016 Nov 28
2
RFC: code size reduction in X86 by replacing EVEX with VEX encoding
Hal, that’s a good point. There are more manually-maintained tables in the X86 backend that should probably be tablegened: the memory-folding tables and ReplaceableInstrs, to name a couple.
If you have ideas on how to get these auto-generated, please let us know.
From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of Hal Finkel via llvm-dev
Sent: Wednesday, November 23, 2016
2012 Aug 28
1
[LLVMdev] TableGen backend support to express relations between instruction
...ue
ADD_pf : predicate false
We can define the relationship between the non-predicated instructions and
their predicate formats as follows:
def getPredOpcode : InstrMapping { // InstrMapping is a new class defined in
Target.td
// Used to filter instructions that have this kind of relationship
let FilterClass = "PredRel";
// Instructions with the same BaseOpcode value form a row.
let RowFields = ["BaseOpcode"];
// Instructions with the same predicate sense form a column.
let ColFields = ["PredSense"];
// The key column is the unpredicated instructions.
let KeyCol = [&quo...
2012 Aug 16
2
[LLVMdev] TableGen related question for the Hexagon backend
Hi Everyone,
After some more thoughts to the Jacob's suggestion of using multiclasses for
Opcode mapping, this is what I have come up with. Please take a look at the
design below and let me know if you have any suggestions/questions.
I have tried to keep the design target independent so that other targets
could benefit from it.
1) The idea is to add 3 new classes into
2012 Aug 21
0
[LLVMdev] TableGen related question for the Hexagon backend
...ansformation like this -
>
> ADD--- ---> ADDtrue -----> ADDtru_new (predicate new form of true)
> \-----> ADDfalse -----> ADDfalse_new (predicate new form of
> false)
>
> // Define Predicate New relation
> def getPredNewOpcode : InstrMapping {
> let FilterClass = "PredNewRel";
>
> let RowFields = ["BaseOpcode"];
>
> // ColFields is a list of flags/attributes of the instructions.
> let ColFields = ["DotNewType", "PredSense"];
>
> // Here 'DotNewType' of the KeyCol is "" and...
2014 Nov 13
2
[LLVMdev] [RFC] TableGen help for relaxation
Hello LLVM,
My target has a complex relaxation hierarchy. Perhaps a modest
TableGen extension would help consolidate most of the work involved in
choosing a relaxed opcode. I also notice the x86 relaxation code with
a comment wondering if TableGen could improve life.
Does the following outline sound interesting?
1) Add a new field of type 'Instruction' to the Instruction class
called
2012 Aug 28
0
[LLVMdev] TableGen backend support to express relations between instruction
Jyotsna,
I hadn't been following this, so I apologize if this has already been
provided, but can you give a quick example of how this functionality is
used?
Thanks in advance,
Hal
On Tue, 28 Aug 2012 13:01:17 -0500
"Jyotsna Verma" <jverma at codeaurora.org> wrote:
> Hi Jakob,
>
> Here is the first draft of the patch to add TableGen backend support
> for the
2012 Aug 28
4
[LLVMdev] TableGen backend support to express relations between instruction
Hi Jakob,
Here is the first draft of the patch to add TableGen backend support for the
instruction mapping tables. Please take a look and let me know your
suggestions. As of now, I create one mapping table per relation which
results into a long .inc file. So, I'm planning to combine everything into a
single table and will include APIs (one per relation) to query from this
table.
Thanks,