Displaying 1 result from an estimated 1 matches for "fifo_engine_status_id".
2016 Feb 25
0
[PATCH] fifo/gk104: fix chid bit mask
From: Xia Yang <xiay at nvidia.com>
Fix the channel id bit mask in FIFO schedule timeout error handling.
FIFO_ENGINE_STATUS_NEXT_ID is bit 27:16 thus 0x0fff0000.
FIFO_ENGINE_STATUS_ID is bit 11:0 thus 0x00000fff.
Signed-off-by: Xia Yang <xiay at nvidia.com>
Reviewed-by: Alexandre Courbot <acourbot at nvidia.com>
---
drm/nouveau/nvkm/engine/fifo/gk104.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drm/nouveau/nvkm/engine/fifo/gk104.c...