Displaying 3 results from an estimated 3 matches for "fifo_ctrl".
2013 Jun 04
0
[PATCH] nouveau: Load firmware for BSP/VP engines on NV84-NV96, NVA0
...0x103c28);
> + unk10c = nv_rd32(priv, 0x103d0c);
> + nv_wr32(priv, 0x103c20, intr);
> + intr = nv_rd32(priv, 0x103c20);
> + if (unk104 == 0x10001 && unk10c == 0x200 && chan && !intr) {
> + nv_debug(priv, "Enabling BSP.FIFO_CTRL\n");
> + nv_mask(priv, 0x103d94, 0, 0x1111); /* FIFO_CTRL */
> + }
> +}
> +
> static int
> nv84_bsp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
> struct nouveau_oclass *oclass, void *data, u32 size,
> @@ -68,6 +...
2013 Jun 03
4
[PATCH] nouveau: Load firmware for BSP/VP engines on NV84-NV96, NVA0
...04);
+ intr = nv_rd32(priv, 0x103c20);
+ chan = nv_rd32(priv, 0x103c28);
+ unk10c = nv_rd32(priv, 0x103d0c);
+ nv_wr32(priv, 0x103c20, intr);
+ intr = nv_rd32(priv, 0x103c20);
+ if (unk104 == 0x10001 && unk10c == 0x200 && chan && !intr) {
+ nv_debug(priv, "Enabling BSP.FIFO_CTRL\n");
+ nv_mask(priv, 0x103d94, 0, 0x1111); /* FIFO_CTRL */
+ }
+}
+
static int
nv84_bsp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size,
@@ -68,6 +108,8 @@ nv84_bsp_ctor(struct nouveau_object *parent, struct nouv...
2013 Jun 23
0
[PATCH v2] nouveau: Load firmware for BSP/VP engines on NV84-NV96, NVA0
..._ro32(xtensa, 0xd0c);
+ if (intr & 0x10)
+ nv_warn(xtensa, "Watchdog interrupt, engine hung.\n");
+ nv_wo32(xtensa, 0xc20, intr);
+ intr = nv_ro32(xtensa, 0xc20);
+ if (unk104 == 0x10001 && unk10c == 0x200 && chan && !intr) {
+ nv_debug(xtensa, "Enabling FIFO_CTRL\n");
+ nv_mask(xtensa, xtensa->addr + 0xd94, 0, xtensa->fifo_val);
+ }
+}
+
+int
+nouveau_xtensa_create_(struct nouveau_object *parent,
+ struct nouveau_object *engine,
+ struct nouveau_oclass *oclass, u32 addr, bool enable,
+ const char *iname, const char *fname...