search for: field_order_cnt

Displaying 8 results from an estimated 8 matches for "field_order_cnt".

2013 Dec 08
2
[PATCH 1/3] nv50: enable h264 and mpeg4 for nv98+ (vp3, vp4.0)
Create the ref_bo without any storage type flags set for now. The issue probably arises from our use of the additional buffer space at the end of the ref_bo. It should probably be split up in the future. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> Tested-by: Martin Peres <martin.peres at labri.fr> Cc: "10.0" <mesa-stable at lists.freedesktop.org> ---
2013 Dec 07
1
H.264 engine differences between fermi and tesla cards
...nsigned tmp_idx : 5; // 34 9..13 -> CurrColIdx (index of associated co-located motion data buffer) > unsigned frame_number : 16; // 34 14..29 > unsigned u34_3030 : 1; // 34 30..30 pp.u34[30:30] > unsigned u34_3131 : 1; // 34 31..31 pad? > > uint32_t field_order_cnt[2]; // 38, 3c > > struct { // 40 > // 0x00223102 > // nfi (needs: top_is_reference, bottom_is_reference, is_long_term, maybe some other state that was saved.. > unsigned fifo_idx : 7; // 00 0..6 -> buffer id >...
2020 Aug 13
0
assert in nouveau_vp3_video_vp.c ?
...ct nouveau_vp3_video_buffer *)d->ref[i]; h->refs[j].fifo_idx = j + 1; h->refs[j].tmp_idx = refs[j]->valid_ref; - assert(dec->refs[refs[j]->valid_ref].vidbuf == refs[j]); +// assert(dec->refs[refs[j]->valid_ref].vidbuf == refs[j]); h->refs[j].field_order_cnt[0] = d->field_order_cnt_list[i][0]; h->refs[j].field_order_cnt[1] = d->field_order_cnt_list[i][1]; h->refs[j].frame_idx = d->frame_num_list[i]; what exactly it was supposed to prevent? I removed it just for testing, and now CinelerraGG from https://git.cinelerra-gg.org...
2013 Jun 30
0
[PATCH v2] nv50: H.264/MPEG2 decoding support via VP2, available on NV84-NV96, NVA0
...lag; // 98 + uint32_t redundant_pic_cnt_present_flag; // 9c + uint32_t transform_8x8_mode_flag; // a0 + uint32_t pad2[(0x1c8 - 0xa0 - 4) / 4]; + uint32_t second_chroma_qp_index_offset; // 1c8 + uint32_t u1cc; // 1cc + uint32_t curr_pic_order_cnt; // 1d0 + uint32_t field_order_cnt[2]; // 1d4 + uint32_t curr_mvidx; // 1dc + struct iref { + uint32_t u00; // 00 + uint32_t field_is_ref; // 04 // bit0: top, bit1: bottom + uint8_t is_long_term; // 08 + uint8_t non_existing; // 09 + uint32_t frame_idx; // 0c + uint32_t field...
2013 Nov 30
2
H.264 engine differences between fermi and tesla cards
On Thu, Nov 21, 2013 at 5:22 PM, Ilia Mirkin <imirkin at alum.mit.edu> wrote: > On Thu, Nov 21, 2013 at 5:07 PM, Benjamin Morris <bmorris at nvidia.com> wrote: >> On 11/19/2013 08:16 PM, Ilia Mirkin wrote: >>> Hello, >>> >>> I hope this is an appropriate style of request for this forum. I added >>> code to support video decoding on the tesla
2013 Jun 27
4
[PATCH] nv50: H.264/MPEG2 decoding support via VP2, available on NV84-NV96, NVA0
...lag; // 98 + uint32_t redundant_pic_cnt_present_flag; // 9c + uint32_t transform_8x8_mode_flag; // a0 + uint32_t pad2[(0x1c8 - 0xa0 - 4) / 4]; + uint32_t second_chroma_qp_index_offset; // 1c8 + uint32_t u1cc; // 1cc + uint32_t curr_pic_order_cnt; // 1d0 + uint32_t field_order_cnt[2]; // 1d4 + uint32_t curr_mvidx; // 1dc + struct iref { + uint32_t u00; // 00 + uint32_t field_is_ref; // 04 // bit0: top, bit1: bottom + uint8_t is_long_term; // 08 + uint8_t non_existing; // 09 + uint32_t frame_idx; // 0c + uint32_t field...
2013 Dec 07
0
H.264 engine differences between fermi and tesla cards
...34 0..1 unsigned fifo_dec_index : 7; // 34 2..8 unsigned tmp_idx : 5; // 34 9..13 -> CurrColIdx (index of associated co-located motion data buffer) unsigned frame_number : 16; // 34 14..29 unsigned u34_3030 : 1; // 34 30..30 pp.u34[30:30] unsigned u34_3131 : 1; // 34 31..31 pad? uint32_t field_order_cnt[2]; // 38, 3c struct { // 40 // 0x00223102 // nfi (needs: top_is_reference, bottom_is_reference, is_long_term, maybe some other state that was saved.. unsigned fifo_idx : 7; // 00 0..6 -> buffer id // tmp_idx is the index of the associated co-located motion data buffer...
2013 Aug 11
10
[PATCH 00/10] Add support for MPEG2 and VC-1 on VP3/VP4 for NV98-NVAF
As it turns out, with the proprietary firmware, the VP3 and VP4 interfaces are identical. Furthermore, this is all already implemented for nvc0. So these patches (a) move the easily sharable bits of the nvc0 implementation into the nouveau directory, and then (b) implement the other parts in nv50. The non-shared parts are still largely copies, but there are some differences, not the least of which