Displaying 5 results from an estimated 5 matches for "fgr64".
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gr64
2012 May 22
2
[LLVMdev] Match operands
...tion this instruction is defined as follows:
// Instructions that convert an FP value to 64-bit fixed point.
let Predicates = [IsFP64bit], DecoderNamespace = "Mips64" in
multiclass FFR1_L_M<bits<6> funct, string opstr> {
def _S : FFR1<funct, 16, opstr, "l.s", FGR64, FGR32>;
def _D64 : FFR1<funct, 17, opstr, "l.d", FGR64, FGR64>;
}
// Instructions that convert an FP value to 32-bit fixed point.
multiclass FFR1_W_M<bits<6> funct, string opstr> {
def _S : FFR1<funct, 16, opstr, "w.s", FGR32, FGR32>;
def _D3...
2012 May 22
0
[LLVMdev] Match operands
...defined as follows:
>
> // Instructions that convert an FP value to 64-bit fixed point.
> let Predicates = [IsFP64bit], DecoderNamespace = "Mips64" in
> multiclass FFR1_L_M<bits<6> funct, string opstr> {
> def _S : FFR1<funct, 16, opstr, "l.s", FGR64, FGR32>;
> def _D64 : FFR1<funct, 17, opstr, "l.d", FGR64, FGR64>;
> }
>
> // Instructions that convert an FP value to 32-bit fixed point.
> multiclass FFR1_W_M<bits<6> funct, string opstr> {
> def _S : FFR1<funct, 16, opstr, "w.s"...
2015 Jul 13
2
[LLVMdev] [RFC] Conditional RegClass membership
Hello,
About a month ago, I submitted a set of patches for review on llvm-commit.
The most controversial of the patches,
http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20150622/d104ea7
1/attachment-0009.obj deals with the fact that before ARMv8, the rGPR
RegClass in Thumb encodings didn't include SP; but from ARMv8 onwards, it
does include it.
RegClass membership is
2012 Aug 18
1
[LLVMdev] MIPS Register Pressure Limit.
Hello,
why LLVM does not define physical register limits for MIPS by overriding the TargetRegisterInfo::getRegPressureLimit function the way it’s done for X86 in x86RegisterInfo.cpp and ARM.
Thanks in advance.
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2018 Sep 21
2
[GlobalISel] Legalize generic instructions that also depend on type of scalar, not only scalar size
Hi,
Mips32 has 64 bit floating point instructions, while i64 instructions
have to be emulated with i32 instructions. This means that G_LOAD should
be custom legalized for s64 integer value, and be legal for s64 floating
point value. There are also other generic instructions with the same
problem: G_STORE, G_SELECT, G_EXTRACT, and G_INSERT.
There are also other configurations where integer