Displaying 1 result from an estimated 1 matches for "fextsr".
2015 Feb 12
3
[LLVMdev] half to float intrinsic promotion
...my intrinsic math operations,
following class and pattern are defined.
"
class S_HF__HF< string asmstr> : Intrinsic
<[llvm_float_ty ], [llvm_float_ty ],
[IntrNoMem],
!strconcat(asmstr, "_f16")>;
def :Pat<( f16 (int_my_math_f16 f16:$src)), (F2Hsr (FEXTsr f16:$src) )>;
“
where FEXTsr is implementing the fextend type profile, F2Hsr is implementing as the float to half conversion .
“int_my_math_f16” is implementing the “S_HF__HF” profile above.
I am just trying to
(1) convert the $src from f16 to f32 using FEXTsr.
(2) use the F2Hsr to conver...