Displaying 7 results from an estimated 7 matches for "fexp2".
Did you mean:
exp2
2016 Aug 31
2
mapping calls to exp() to expf opcode
...argetInstrinfo.td file for both of these
instructions:
def SQRTF64 : Other2ROp< 0b0001101, "sqrtF", fsqrt, OpInfo_F64, II_ELEMF3 >;
def SQRTF32 : Other2ROp< 0b0001101, "sqrtF", fsqrt, OpInfo_F32, II_ELEMF1 >;
def EXPF64 : Other2ROp< 0b0001010, "expF", fexp2, OpInfo_F64, II_ELEMF3 >;
def EXPF32 : Other2ROp< 0b0001010, "expF", fexp2, OpInfo_F32, II_ELEMF1 >;
..essentially the same kind of definition for both SQRTF and EXPF, but for
the latter I don't see expf opcodes being generated.
Any idea what might be missing for exp?
P...
2009 May 20
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
...case ISD::FP_TO_SINT:
+ case ISD::FP_TO_UINT:
+ case ISD::FNEG:
+ case ISD::FABS:
+ case ISD::FSQRT:
+ case ISD::FSIN:
+ case ISD::FCOS:
+ case ISD::FPOWI:
+ case ISD::FPOW:
+ case ISD::FLOG:
+ case ISD::FLOG2:
+ case ISD::FLOG10:
+ case ISD::FEXP:
+ case ISD::FEXP2:
+ case ISD::FCEIL:
+ case ISD::FTRUNC:
+ case ISD::FRINT:
+ case ISD::FNEARBYINT:
+ case ISD::FFLOOR:
+ switch (TLI.getOperationAction(I->getOpcode(), I->getValueType(0))) {
+ case TargetLowering::Promote:
+ Result = PromoteVectorOp(SDValue(Result, 0)).getNode...
2009 May 20
0
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
...case ISD::FP_TO_SINT:
+ case ISD::FP_TO_UINT:
+ case ISD::FNEG:
+ case ISD::FABS:
+ case ISD::FSQRT:
+ case ISD::FSIN:
+ case ISD::FCOS:
+ case ISD::FPOWI:
+ case ISD::FPOW:
+ case ISD::FLOG:
+ case ISD::FLOG2:
+ case ISD::FLOG10:
+ case ISD::FEXP:
+ case ISD::FEXP2:
+ case ISD::FCEIL:
+ case ISD::FTRUNC:
+ case ISD::FRINT:
+ case ISD::FNEARBYINT:
+ case ISD::FFLOOR:
+ switch (TLI.getOperationAction(I->getOpcode(), I->getValueType(0))) {
+ case TargetLowering::Promote:
+ Result = PromoteVectorOp(SDValue(Result, 0)).getNode...
2009 May 21
0
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote:
> Can you explain why you chose the approach of using a new pass?
> I pictured removing LegalizeDAG's type legalization code would
> mostly consist of finding all the places that use TLI.getTypeAction
> and just deleting code for handling its Expand and Promote. Are you
> anticipating something more
2009 May 20
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On May 20, 2009, at 1:34 PM, Eli Friedman wrote:
> On Wed, May 20, 2009 at 1:19 PM, Eli Friedman
> <eli.friedman at gmail.com> wrote:
>
>> Per subject, this patch adding an additional pass to handle vector
>>
>> operations; the idea is that this allows removing the code from
>>
>> LegalizeDAG that handles illegal types, which should be a significant
2009 May 21
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
...case ISD::FP_TO_SINT:
+ case ISD::FP_TO_UINT:
+ case ISD::FNEG:
+ case ISD::FABS:
+ case ISD::FSQRT:
+ case ISD::FSIN:
+ case ISD::FCOS:
+ case ISD::FPOWI:
+ case ISD::FPOW:
+ case ISD::FLOG:
+ case ISD::FLOG2:
+ case ISD::FLOG10:
+ case ISD::FEXP:
+ case ISD::FEXP2:
+ case ISD::FCEIL:
+ case ISD::FTRUNC:
+ case ISD::FRINT:
+ case ISD::FNEARBYINT:
+ case ISD::FFLOOR:
+ switch (TLI.getOperationAction(I->getOpcode(), I->getValueType(0))) {
+ case TargetLowering::Promote:
+ Result = PromoteVectorOp(SDValue(Result, 0)).getNode...
2012 Jul 16
3
[LLVMdev] RFC: LLVM incubation, or requirements for committing new backends
...ion(ISD::SELECT_CC, MVT::f32, Custom);
> + setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
> +
> + // Library functions. These default to Expand, but we have instructions
> + // for them.
> + setOperationAction(ISD::FCEIL, MVT::f32, Legal);
> + setOperationAction(ISD::FEXP2, MVT::f32, Legal);
> + setOperationAction(ISD::FRINT, MVT::f32, Legal);
> +
> + setOperationAction(ISD::UDIV, MVT::i32, Expand);
> + setOperationAction(ISD::UDIVREM, MVT::i32, Custom);
> + setOperationAction(ISD::UREM, MVT::i32, Expand);
> +}
> +
> +SDValue AMDGPUTarge...