Displaying 2 results from an estimated 2 matches for "featurevectoruamem".
2014 Dec 14
2
[LLVMdev] Memory alignment model on AVX, AVX2 and AVX-512 targets
Hi,
I think that
def FeatureVectorUAMem : SubtargetFeature<"vector-unaligned-mem",
"HasVectorUAMem", "true",
"Allow unaligned memory operands on vector/SIMD instructions">;
should be switched-ON on AVX and AVX-512 instructions becaus...
2014 Dec 15
2
[LLVMdev] Memory alignment model on AVX, AVX2 and AVX-512 targets
...from folks that are supporting AMD processors which do support AVX to ensure that there isn't an undue runtime penalty for these.
On Sun, Dec 14, 2014 at 7:08 AM, Demikhovsky, Elena <elena.demikhovsky at intel.com<mailto:elena.demikhovsky at intel.com>> wrote:
Hi,
I think that
def FeatureVectorUAMem : SubtargetFeature<"vector-unaligned-mem",
"HasVectorUAMem", "true",
"Allow unaligned memory operands on vector/SIMD instructions">;
should be switched-ON on AVX and AVX-512 instructions becaus...