Displaying 2 results from an estimated 2 matches for "featurediv".
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featured
2015 Oct 15
3
what can cause a "CPU table is not sorted" assertion
...ot1]>;
def : WriteRes<WriteALU, [SlotAny]> {
let Latency = 1;
let ResourceCycles =[1];
}
def : WriteRes<WriteBranch, [Slot0]> {
let Latency = 1;
let ResourceCycles =[1];
}
}
I've also changed OR1K.td to have
def : ProcessorModel<"generic", MyTargetModel, [FeatureDiv, FeatureMul]>;
def : ProcessorModel<"or1200", MyTargetModel, [FeatureDiv, FeatureMul]>;
No issues compiling the code. But when I run the following command I get
and assertion:
llc -mcpu=mytarget hello_world.compiled.ll -debug-only=misched
-mtriple=mytarget-unknown-linux-gnu...
2016 Mar 05
2
Enable / Disable a processor feature
...looks like
// Esencia subtarget features
//===----------------------------------------------------------------------===//
def FeatureMul : SubtargetFeature<"mul", "HasMul", "true",
"Enable hardware multiplier">;
def FeatureDiv : SubtargetFeature<"div", "HasDiv", "true",
"Enable hardware divider">;
def FeatureCmov : SubtargetFeature<"cmov", "HasCmov", "true",
"Enable...