search for: fea00000

...RX packets:259555 errors:0 dropped:0 overruns:0 frame:0 TX packets:267985 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:100 RX bytes:41494651 (39.5 Mb) TX bytes:106749960 (101.8 Mb) Interrupt:48 Base address:0xdc80 Memory:fe9e0000-fea00000 eth0:0 Link encap:Ethernet HWaddr 00:E0:81:23:E0:87 inet addr:10.2.5.4 Bcast:10.3.255.255 Mask:255.0.0.0 UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1 RX packets:259555 errors:0 dropped:0 overruns:0 frame:0 TX packets:267985 errors:0 dropped:0 ove...

...queuelen 1000 (Ethernet) RX packets 6597320 bytes 9692134059 (9.0 GiB) RX errors 0 dropped 0 overruns 0 frame 0 TX packets 534283 bytes 57365155 (54.7 MiB) TX errors 0 dropped 0 overruns 0 carrier 0 collisions 0 device interrupt 16 memory 0xfe9e0000-fea00000 [root at nestor:~] # cat /etc/hostname nestor [root at nestor:~] # cat /etc/hosts # /etc/hosts 127.0.0.1 localhost.localdomain localhost 192.168.2.1 nestor.microlinux.lan nestor 192.168.2.252 hp-officejet.microlinux.lan hp-officejet 192.168.2.253 nas.microlinux.lan nas 192.168.2.254 wifi.mi...

...DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 10 Region 0: I/O ports at c060 [size=32] Region 1: Memory at febd6000 (32-bit, non-prefetchable) [size=4K] Region 2: Memory at fea00000 (32-bit, non-prefetchable) [size=512K] Expansion ROM at feb80000 [disabled] [size=256K] Capabilities: [84] MSI-X: Enable+ Count=3 Masked- Vector table: BAR=1 offset=00000000 PBA: BAR=1 offset=00000800 Capabilities: [70] VirtIO: Notify BAR=2 offset=00003000 size=00040000 multiplier=000010...

...DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 10 Region 0: I/O ports at c060 [size=32] Region 1: Memory at febd6000 (32-bit, non-prefetchable) [size=4K] Region 2: Memory at fea00000 (32-bit, non-prefetchable) [size=512K] Expansion ROM at feb80000 [disabled] [size=256K] Capabilities: [84] MSI-X: Enable+ Count=3 Masked- Vector table: BAR=1 offset=00000000 PBA: BAR=1 offset=00000800 Capabilities: [70] VirtIO: Notify BAR=2 offset=00003000 size=00040000 multiplier=000010...

...00 Metric:1 RX packets:49916 errors:0 dropped:0 overruns:0 frame:0 TX packets:27221 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:7366849 (7.0 MiB) TX bytes:3741826 (3.5 MiB) Base address:0xddc0 Memory:fe9e0000-fea00000 [root at obiwan ~]# telnet 192.168.0.101 25 Trying 192.168.0.101... telnet: connect to address 192.168.0.101: Connection refused telnet: Unable to connect to remote host: Connection refused [root at obiwan ~]# telnet 127.0.0.1 25 Trying 127.0.0.1... Connected to obiwan (127.0.0.1). Escape characte...

virtio uses vendor-specific capabilities to specify the location of the virtio register ranges. The specification can be found here: http://docs.oasis-open.org/virtio/virtio/v1.0/cs01/virtio-v1.0-cs01.html#x1-690004 This patch adds support for decoding these capabilities to lspci. Signed-off-by: Gerd Hoffmann <kraxel at redhat.com> --- Makefile | 2 +- ls-caps-vendor.c | 76

virtio uses vendor-specific capabilities to specify the location of the virtio register ranges. The specification can be found here: http://docs.oasis-open.org/virtio/virtio/v1.0/cs01/virtio-v1.0-cs01.html#x1-690004 This patch adds support for decoding these capabilities to lspci. Signed-off-by: Gerd Hoffmann <kraxel at redhat.com> --- Makefile | 2 +- ls-caps-vendor.c | 76

Hi all, I downloaded the xen 3.3.0 and now testing the pci pass-through with the NIC. Using late binding, the pci slot 0000:08:01.0 is assigned to pciback. But pci related xm commands are not working. For eg: linux-242:/home/xen-3.3.0 # xm pci-list-assignable-devices Unexpected error: <type ''exceptions.OSError''> Please report to

...rsion 2 Capabilities: [58] Debug port 00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev c2) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=01, subordinate=01, sec-latency=32 I/O behind bridge: 0000d000-0000dfff Memory behind bridge: fea00000-feafffff 00:1f.0 ISA bridge: Intel Corporation 82801EB/ER (ICH5/ICH5R) LPC Interface Bridge (rev 02) Flags: bus master, medium devsel, latency 0 00:1f.1 IDE interface: Intel Corporation 82801EB/ER (ICH5/ICH5R) IDE Controller (rev 02) (prog-if 8a [Master SecP PriP]) Subsystem: Dell Unknown devic...

...xa10-0xa1f has been reserved PCI: Error while updating region 0000:00:14.0/1 (e0000004 != 8000a014) PCI: Bridge: 0000:00:01.0 IO window: c000-cfff MEM window: fe800000-fe9fffff PREFETCH window 0x00000000fc000000-0x00000000fdffffff PCI: Bridge: 0000:00:04.0 IO window: d000-dfff MEM window: fea00000-feafffff PREFETCH window: disabled. PCI: Bridge: 0000:00:05.0 IO window: e000-efff MEM window: feb00000-febfffff PREFETCH window: disabled. PCI: Bridge: 0000:00:14.4 IO window: disabled. MEM window: disabled. PREFETCH window: disabled. PCI: Setting latency timer of device 0000:00:04.0...

...bridge: Advanced Micro Devices [AMD] RS780 PCI to PCI bridge (PCIE port 3) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 I/O behind bridge: 0000d000-0000dfff Memory behind bridge: fea00000-feafffff Prefetchable memory behind bridge: 00000000dff00000-00000000dfffffff Capabilities: [50] Power Management version 3 Capabilities: [58] Express Root Port (Slot+), MSI 00 Capabilities: [a0] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable- C...

...ffffff could not be reserved PCI: Error while updating region 0000:00:14.0/1 (f0000004 != 8000a014) PCI: Bridge: 0000:00:01.0 IO window: c000-cfff MEM window: fe800000-fe9fffff PREFETCH window 0x00000000fc000000-0x00000000fdffffff PCI: Bridge: 0000:00:04.0 IO window: d000-dfff MEM window: fea00000-feafffff PREFETCH window: disabled. PCI: Bridge: 0000:00:05.0 IO window: e000-efff MEM window: feb00000-febfffff PREFETCH window: disabled. PCI: Bridge: 0000:00:14.4 IO window: disabled. MEM window: disabled. PREFETCH window: disabled. PCI: Setting latency timer of device 0000:00:04.0...

Now that x86-64 has directly accessible percpu variables, it can also implement the direct versions of these operations, which operate on a vcpu_info structure directly embedded in the percpu area. In fact, the 64-bit versions are more or less identical, and so can be shared. The only two differences are: 1. xen_restore_fl_direct takes its argument in eax on 32-bit, and rdi on 64-bit.

...> 97c20000-97c203ff : ehci_hcd > 97c21000-97c213ff : 0000:00:1a.7 > 97c21000-97c213ff : ehci_hcd > 97c22000-97c220ff : 0000:00:1f.3 > fc000000-fcffffff : reserved > fc000000-fcffffff : pnp 00:0a > fe710000-fe711fff : pnp 00:0a > fe800000-fe9fffff : pnp 00:0a > fea00000-feafffff : pnp 00:0a > feb00000-febfffff : pnp 00:0a > fec00000-fec003ff : IOAPIC 0 > fec80000-fec803ff : IOAPIC 1 > fed00000-fed003ff : HPET 0 > fed00000-fed003ff : pnp 00:05 > fed1c000-fed1ffff : reserved > fed1c000-fed1ffff : pnp 00:0a > fee00000-feefffff : pnp 00:0a &g...