search for: fczero

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2007 Aug 18
1
[LLVMdev] Soft floating point support
This patch supplies software IEEE floating point support. The comment from the patch reproduced below says all there is to say. This patch contains the prior "cleanup" patch; please don't apply that one. Please let me know of any bugs. It is tested reasonably well, but until I put together random tests it's hard to have 100% confidence. Neil. /* A self-contained host- and
2015 Jan 02
2
[LLVMdev] [PATCH] [ADT] APFloat - Fix sign handling for FMA results that truncate to zero.
...to zero in standard precision. The following snippet handles the signedness in fusedMultiplyAdd: /* If two numbers add (exactly) to zero, IEEE 754 decrees it is a positive zero unless rounding to minus infinity, except that adding two like-signed zeroes gives that zero. */ if (category == fcZero && sign != addend.sign) sign = (rounding_mode == rmTowardNegative); The test "category == fcZero" tells us that the result was zero after rounding back down to standard precision, but since the addition is carried out in extended precision this doesn't guarantee that the re...
2015 Jan 03
2
[LLVMdev] [PATCH] [ADT] APFloat - Fix sign handling for FMA results that truncate to zero.
...gt; The following snippet handles the signedness in fusedMultiplyAdd: > > /* If two numbers add (exactly) to zero, IEEE 754 decrees it is a > positive zero unless rounding to minus infinity, except that > > adding two like-signed zeroes gives that zero. */ > if (category == fcZero && sign != addend.sign) > sign = (rounding_mode == rmTowardNegative); > > The test "category == fcZero" tells us that the result was zero after > rounding back down to standard precision, but since the addition is carried > out in extended precision this doesn'...