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...with you as soon as I have put it up for review. As far as I'm aware, the bugfix should be relatively version-agnostic, so you should not have too much trouble backporting it. The solution basically works like this: * Model FPSW (the FPU status word) as a register. * Add ISel patterns for the FCOM*, FNSTSW and SAHF instructions. * During Legalize/Lowering, build a node sequence to transport the comparison result from FPSW into EFLAGS. The patch itself is already finished, but I want to add a few test cases before submitting it (probably during the weekend if I find the time). Cheers, Chris...

Hello there, I recently started working on the LLVM backend for a target that doesn't support x87 instructions. Currently, I am in the process of completely disabling some x87 instructions such as fcomi, fcompi,... for a specific sub-target. I also do not have SSE enabled for my sub-target, and llvm resorts to fcomi* instructions for FP compare instructions. Is there a way to bypass the automatic optimization that generates the x87 instructions when SSE is disabled, and completely eliminate the...