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2018 May 07
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LLVM Weekly - #227, May 7th 2018
...ttps://reviews.llvm.org/rL331601).
* llvm-mca gained a test that demonstrates support for generating instruction
tables for in-order CPUs. [r331169](https://reviews.llvm.org/rL331169).
## Clang commits
* Initial support was added for the proposed `char8_t` type. This is
controlled by the flag `-fchar8_t` and is subject to change.
[r331244](https://reviews.llvm.org/rL331244).
* The MachineOutliner can now be explicitly enabled for AArch64 using
`-foutline`. [r331370](https://reviews.llvm.org/rL331370).
* getConstraintRegister was implemented for ARM and AArch64, allowing an error
to be generated...