Displaying 4 results from an estimated 4 matches for "faultmask".
2011 Aug 28
2
[LLVMdev] cortex-m{3,4} special registers
..."\tmrs    %0, primask\n"
     ^
<inline asm>:1:14: note: instantiated into assembly here
                mrs    r5, primask
                           ^
This appears to be due to llvm lacking support for the various
cortex-m{3,4} special registers.  ("primask", "faultmask", etc)
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0491c/ch05s13s01.html
Can someone tell me how I would go about adding support for these
special registers?
-Kurt
2011 Aug 29
0
[LLVMdev] cortex-m{3,4} special registers
...n"
>     ^
> <inline asm>:1:14: note: instantiated into assembly here
>                mrs    r5, primask
>                           ^
> 
> This appears to be due to llvm lacking support for the various
> cortex-m{3,4} special registers.  ("primask", "faultmask", etc)
> 
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0491c/ch05s13s01.html
> 
> Can someone tell me how I would go about adding support for these
> special registers?
> 
> -Kurt
> _______________________________________________
> LLVM Developers...
2011 Aug 30
2
[LLVMdev] cortex-m{3,4} special registers
...<inline asm>:1:14: note: instantiated into assembly here
> >                mrs    r5, primask
> >                           ^
> >
> > This appears to be due to llvm lacking support for the various
> > cortex-m{3,4} special registers.  ("primask", "faultmask", etc)
> >
> >
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0491c/ch05s1
> 3s01.html
> >
> > Can someone tell me how I would go about adding support for these
> > special registers?
> >
> > -Kurt
> > ____________________...
2011 Aug 31
0
[LLVMdev] cortex-m{3,4} special registers
...note: instantiated into assembly here
> > >                mrs    r5, primask
> > >                           ^
> > >
> > > This appears to be due to llvm lacking support for the various
> > > cortex-m{3,4} special registers.  ("primask", "faultmask", etc)
> > >
> > >
> > http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0491c/ch05s1
> > 3s01.html
> > >
> > > Can someone tell me how I would go about adding support for these
> > > special registers?
> > >
> &...