Displaying 3 results from an estimated 3 matches for "fastboard".
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2017 Nov 13
2
Reaching definitions on Machine IR post register allocation
...an I am seeing something in the RDF graph that I
> do not quite understand. I think there is an data flow edge that is
> missing but most likely I am wrong.
>
> The relevant portion of IR looks like this:
>
> BB#0:
>
> %R10<def> = MOVSX64rr32 %EDX<kill>; dbg:FastBoard.cpp:186:26 @[
> FastBoard.cpp:1938:21 ]
>
> .
>
> .
>
> .
>
> TEST32rr %ESI<kill>, %R8D<kill>, %EFLAGS...
2017 Nov 24
2
Reaching definitions on Machine IR post register allocation
...t; do not quite understand. I think there is an data flow edge that is missing
>>> but most likely I am wrong.
>>>
>>> The relevant portion of IR looks like this:
>>>
>>> BB#0:
>>>
>>> %R10<def> = MOVSX64rr32 %EDX<kill>; dbg:FastBoard.cpp:186:26 @[
>>> FastBoard.cpp:1938:21 ]
>>>
>>> .
>>>
>>> .
>>>
>>> .
>>>...
2017 Nov 01
2
Reaching definitions on Machine IR post register allocation
Hi Geoff/Krzyssztof,
Wouldn't the isRenamable() change be required even for the RDF based copy propagation? Maybe Hexagon does not impose ABI/ISA restrictions which require specific registers to be used in specific contexts.
Also, if Geoff's copy propagation pass is invoked post-RA wouldn't it need to handle the x86 ISA feature which allows 8 bit/16 bit values to be moved into a