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2016 Sep 19
3
[arm, aarch64] Alignment checking in interleaved access pass
Hi,
As a follow up to Patch D23646 <https://reviews.llvm.org/D23646>, I'm
trying to figure out if there should be an alignment check and what the
correct approach is.
Some background:
For stores, the pass turns:
%i.vec = shuffle <8 x i32> %v0, <8 x i32> %v1,
<0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11>
store <12 x i32> %i.vec, <12 x i32>* %ptr
2016 Oct 10
2
[arm, aarch64] Alignment checking in interleaved access pass
...= in[i] * Factor; // R
> out[i+1] = in[i+1] * Factor; // G
> out[i+2] = in[i+2] * Factor; // B
>
> This pattern is easily vectorised on most platforms, since loads, muls
> and stores are the exact same operation. which can be combined.
>
> for (i..N)
> out[i] = in[i] * FactorR; // R
> out[i+1] = in[i+1] * FactorG; // G
> out[i+2] = in[i+2] * FactorB; // B
>
> This still can be vectorised easily, since the Factor vector can be
> easily constructed.
>
> for (i..N)
> out[i] = in[i] + FactorR; // R
> out[i+1] = in[i+1] - FactorG; // G
>...