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Displaying 2 results from an estimated 2 matches for "f624cef4".

2016 Jun 29
2
x86: How to Force 2-byte `jmp` instruction in lowering
On 22 June 2016 at 16:36, Dean Michael Berris via llvm-dev <llvm-dev at lists.llvm.org> wrote: > Peter suggested just writing out '.byte 0xeb, 0x09' and that allowed the > jump instruction to bypass the relaxation, so that fixes my immediate > problem. The question still stands though whether it should be possible to > do through the instruction builder interface. > I
2016 Jun 29
0
x86: How to Force 2-byte `jmp` instruction in lowering
...'s the advantage (if any) of Clang passing the 'relax-all' flag down to MC? Is there a good reason for this behaviour at all? Thanks Rafael! -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160629/f624cef4/attachment.html>