search for: f3b

Displaying 10 results from an estimated 10 matches for "f3b".

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2015 Dec 19
2
[PATCH] nvc0: add hardware ETC2 and ASTC support where possible
...4 +#define NV50_TIC_0_FMT_ASTC_2D_12X12 0x46 + #if NOUVEAU_DRIVER == 0xc0 # define NVXX_3D_VAF_SIZE(s) NVC0_3D_VERTEX_ATTRIB_FORMAT_SIZE_##s # define NVXX_3D_VAF_TYPE(t) NVC0_3D_VERTEX_ATTRIB_FORMAT_TYPE_##t @@ -296,6 +319,47 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] = F3B(BPTC_RGB_FLOAT, NONE, C0, C1, C2, xx, FLOAT, BPTC_FLOAT, t), F3B(BPTC_RGB_UFLOAT, NONE, C0, C1, C2, xx, FLOAT, BPTC_UFLOAT, t), + F3B(ETC2_RGB8, NONE, C0, C1, C2, xx, UNORM, ETC2_RGB, t), + F3B(ETC2_SRGB8, NONE, C0, C1, C2, xx, UNORM, ETC2_RGB, t), + C4B(ETC2_RGB8A1,...
2014 Mar 01
0
[PATCH] nv50,nvc0: add 11f_11f_10f vertex support
...allium/drivers/nouveau/nv50/nv50_formats.c @@ -204,7 +204,7 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] = C4A(R10G10B10A2_UINT, RGB10_A2_UINT, C0, C1, C2, C3, UINT, 10_10_10_2, TRV, 0), C4A(B10G10R10A2_UINT, RGB10_A2_UINT, C2, C1, C0, C3, UINT, 10_10_10_2, TV, 0), - F3B(R11G11B10_FLOAT, R11G11B10_FLOAT, C0, C1, C2, xx, FLOAT, 11_11_10, IB), + F3A(R11G11B10_FLOAT, R11G11B10_FLOAT, C0, C1, C2, xx, FLOAT, 11_11_10, IBV), F3B(L8_UNORM, R8_UNORM, C0, C0, C0, xx, UNORM, 8, TB), F3B(L8_SRGB, R8_UNORM, C0, C0, C0, xx, UNORM, 8, TB), diff --git a/src/gallium/dr...
2015 Dec 19
0
[PATCH] nvc0: add hardware ETC2 and ASTC support where possible
..._2D_12X12 0x46 > + > #if NOUVEAU_DRIVER == 0xc0 > # define NVXX_3D_VAF_SIZE(s) NVC0_3D_VERTEX_ATTRIB_FORMAT_SIZE_##s > # define NVXX_3D_VAF_TYPE(t) NVC0_3D_VERTEX_ATTRIB_FORMAT_TYPE_##t > @@ -296,6 +319,47 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] = > F3B(BPTC_RGB_FLOAT, NONE, C0, C1, C2, xx, FLOAT, BPTC_FLOAT, t), > F3B(BPTC_RGB_UFLOAT, NONE, C0, C1, C2, xx, FLOAT, BPTC_UFLOAT, t), > > + F3B(ETC2_RGB8, NONE, C0, C1, C2, xx, UNORM, ETC2_RGB, t), > + F3B(ETC2_SRGB8, NONE, C0, C1, C2, xx, UNORM, ETC2_RGB, t), > +...
2014 May 20
14
[PATCH 00/12] Cherry-pick nv50/nvc0 patches from gallium-nine
I went through the gallium-nine tree and picked out nouveau patches that are general bug-fixes. The first bunch I'd like to also get into 10.2. I've reviewed all of them and they make sense to me, but sending them out for public review as well in case there are any objections. Unless I hear objections, I'd like to push this by Friday. Christoph Bumiller (11): nv50,nvc0: always pull
2010 Jul 15
1
Error using the mi package
...b* c12c* c12d* c12e* c12f* c19* d1* d2* d3* d6* d7a* d7b* d7c* d7d* d7e* d7f* d7g* d7h* d7i* d8a* d8b* d8c* d8d* d8e* d8f* d8g* d8h* d8i* d9a* d9b* d9c* d9d* d9e* d10a* d10b* d10c* d10d* d10e* d10f* d11* d13* d14* e1* e2* e3* e5* e6* f2* f3a* f3b* f3c* f3d* f3e* f4* f6* f7* f8* f9* f12* f14* f15* f16* f20* f21* f22* f23* f25* g2* g3* g6* g8* g9* g12* g13* g15* g17* g18* g22* g25* g26* g27* g28* g31* g34* g43* g55* g58* g59* g60* g61* g63* g65* g68a* g68b* g69* g70* g71* g91* g92* g93...
2016 Feb 15
24
[PATCH 01/23] nv50: import updated g80_defs.xml.h from rnndb
From: Ben Skeggs <bskeggs at redhat.com> Signed-off-by: Ben Skeggs <bskeggs at redhat.com> --- src/gallium/drivers/nouveau/nv50/g80_defs.xml.h | 279 ++++++++++++++++++++++++ 1 file changed, 279 insertions(+) create mode 100644 src/gallium/drivers/nouveau/nv50/g80_defs.xml.h diff --git a/src/gallium/drivers/nouveau/nv50/g80_defs.xml.h
2016 Feb 15
1
[PATCH 09/23] nv50-: separate vertex formats from surface format descriptions
...+ r, r, r, r, UINT, UINT, UINT, UINT, s, u) > + > +#define V_F3A(p, n, r, g, b, a, t, s, u) \ > + V_C4A(p, n, r, g, b, ONE_FLOAT, t, s, u, 0) > +#define V_I3A(p, n, r, g, b, a, t, s, u) \ > + V_C4A(p, n, r, g, b, ONE_INT, t, s, u, 0) > +#define V_F3B(p, n, r, g, b, a, t, s, u) \ > + V_C4B(p, n, r, g, b, ONE_FLOAT, t, s, u) > +#define V_I3B(p, n, r, g, b, a, t, s, u) \ > + V_C4B(p, n, r, g, b, ONE_INT, t, s, u) > + > +#define V_F2A(p, n, r, g, b, a, t, s, u) \ > + V_C4A(p, n, r, g, ZERO, ONE_FLO...
2016 Feb 15
0
[PATCH 09/23] nv50-: separate vertex formats from surface format descriptions
...\ + r, r, r, r, UINT, UINT, UINT, UINT, s, u) + +#define V_F3A(p, n, r, g, b, a, t, s, u) \ + V_C4A(p, n, r, g, b, ONE_FLOAT, t, s, u, 0) +#define V_I3A(p, n, r, g, b, a, t, s, u) \ + V_C4A(p, n, r, g, b, ONE_INT, t, s, u, 0) +#define V_F3B(p, n, r, g, b, a, t, s, u) \ + V_C4B(p, n, r, g, b, ONE_FLOAT, t, s, u) +#define V_I3B(p, n, r, g, b, a, t, s, u) \ + V_C4B(p, n, r, g, b, ONE_INT, t, s, u) + +#define V_F2A(p, n, r, g, b, a, t, s, u) \ + V_C4A(p, n, r, g, ZERO, ONE_FLOAT, t, s, u, 0) +#define V_I2A...
2018 Jan 09
2
Replication Error
Hi Denis Thanks for your response without your crystal ball. I have increased the log level =9 dns:0 on both the servers. It replicates successfully by manually running the command samba-tool drs replicate SERVER2 SERVER1 dc=iumnet,dc=edu,dc=na --full-sync but it is still failing when I check from the samba-tool drs showrepl Also I run samba-tool dbcheck --cross-ncs --fix on both the servers
2013 Nov 05
1
Problem migration from cyrus with imapc
...=sync_mails changed=1 dsync(m1234567890): Debug: brain M: in state=sync_mails dsync(m1234567890): Debug: brain M: in box 'INBOX' recv_state=changes send_state=mail_requests dsync(m1234567890): Debug: brain M: Import INBOX: Import change GUID= UID=272 hdr_hash=68a2925178bf0e3dda93c8b77229a f3b dsync(m1234567890): Debug: brain M: out box 'INBOX' recv_state=changes send_state=mail_requests changed=1 dsync(m1234567890): Debug: brain M: out state=sync_mails changed=1 dsync(m1234567890): Debug: brain S: in state=sync_mails dsync(m1234567890): Debug: brain S: in box 'INBOX' r...