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63716ce9
2011 Sep 29
1
[LLVMdev] Marking machineinstructions that are spills generated by register allocation
Our TCE backend (which is not in the official llvm repo) benefits
greatly from information that which memory load/store is a spill
generated by register allocation.
These spill memory operation can never alias with other memory
operations, and our own instruction scheduler can optimize much better
with better alias information.
I have created a code which adds marking these spill