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2016 Mar 18
2
LLVM IR temporary variable reuse
I meant LLVM registers. Thanks for the correcting me. On 18 March 2016 at 10:42, David Blaikie <dblaikie at gmail.com> wrote: > Question is hard to understand - the registers in LLVM are in Static > Single Assignment form > <https://en.wikipedia.org/wiki/Static_single_assignment_form>, they're > not variables that can be assigned and reassigned values (so the answer