search for: f036f65a

Displaying 2 results from an estimated 2 matches for "f036f65a".

2018 Dec 11
2
Automatic GPU Code Generation
Hello, I need to ask, like automatic compiler vectorization, can GPU ISA be generated automatically, by skipping the CUDA programming? For instance if i just write C code there can be 2 possibilities, semi and full automatic. In case of semi, we can write #pragma directives to say this should be run on gpu. hence can the compiler generates directly gpu ISA, skipping CUDA code? In case of fully
2018 Dec 11
2
Automatic GPU Code Generation
...>> LLVM Developers mailing list >> llvm-dev at lists.llvm.org >> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev >> > -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20181211/f036f65a/attachment.html>